From f0537b9db29afd851323e4b7d7ae3156d6bfb1b6 Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Mon, 13 May 2024 15:40:02 +0100 Subject: [PATCH 1087/1135] spi: dw: Handle any number of gpiod CS lines Even when configured to use only gpiod CS lines, the DW SPI controller still expects a bit to be set in the SER register, otherwise transfers stall. For the csgpiod case, nominate bit 0 for the job. See: https://github.com/raspberrypi/linux/issues/6159 Signed-off-by: Phil Elwell --- drivers/spi/spi-dw-core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -98,7 +98,8 @@ void dw_spi_set_cs(struct spi_device *sp * support active-high or active-low CS level. */ if (cs_high == enable) - dw_writel(dws, DW_SPI_SER, BIT(spi_get_chipselect(spi, 0))); + dw_writel(dws, DW_SPI_SER, + BIT(spi_get_csgpiod(spi, 0) ? 0 : spi_get_chipselect(spi, 0))); else dw_writel(dws, DW_SPI_SER, 0); }