// SPDX-License-Identifier: GPL-2.0-or-later OR MIT /* * Copyright (C) 2023 Tianling Shen */ /dts-v1/; #include #include #include #include "mt7986a.dtsi" / { model = "JDCloud RE-CP-03"; compatible = "jdcloud,re-cp-03", "mediatek,mt7986a"; aliases { led-boot = &red_led; led-failsafe = &red_led; led-running = &green_led; led-upgrade = &green_led; serial0 = &uart0; }; chosen { bootargs-override = "root=/dev/fit0 rootwait"; stdout-path = "serial0:115200n8"; rootdisk = <&emmc_rootdisk>; }; memory@40000000 { reg = <0 0x40000000 0 0x40000000>; }; gpio-keys { compatible = "gpio-keys"; button-joylink { label = "joylink"; linux,code = ; gpios = <&pio 10 GPIO_ACTIVE_LOW>; }; button-reset { label = "reset"; linux,code = ; gpios = <&pio 9 GPIO_ACTIVE_LOW>; }; }; gpio-leds { compatible = "gpio-leds"; led-0 { color = ; function = LED_FUNCTION_STATUS; gpios = <&pio 7 GPIO_ACTIVE_HIGH>; }; red_led: led-1 { color = ; function = LED_FUNCTION_STATUS; gpios = <&pio 11 GPIO_ACTIVE_HIGH>; }; green_led: led-2 { color = ; function = LED_FUNCTION_STATUS; gpios = <&pio 12 GPIO_ACTIVE_LOW>; }; }; reg_1p8v: regulator-1p8v { compatible = "regulator-fixed"; regulator-name = "fixed-1.8V"; regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; regulator-boot-on; regulator-always-on; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; }; &crypto { status = "okay"; }; ð { status = "okay"; gmac0: mac@0 { compatible = "mediatek,eth-mac"; reg = <0>; phy-mode = "2500base-x"; nvmem-cells = <&macaddr_factory_2a 0>; nvmem-cell-names = "mac-address"; fixed-link { speed = <2500>; full-duplex; pause; }; }; gmac1: mac@1 { compatible = "mediatek,eth-mac"; reg = <1>; phy-mode = "2500base-x"; phy-handle = <&phy6>; nvmem-cells = <&macaddr_factory_24 0>; nvmem-cell-names = "mac-address"; }; mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; }; }; &mdio { phy6: phy@6 { compatible = "ethernet-phy-ieee802.3-c45"; reg = <6>; reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>; reset-assert-us = <15000>; reset-deassert-us = <68000>; realtek,aldps-enable; }; switch: switch@1f { compatible = "mediatek,mt7531"; reg = <31>; reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; interrupt-controller; #interrupt-cells = <1>; interrupt-parent = <&pio>; interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; }; }; &mmc0 { bus-width = <8>; cap-mmc-highspeed; hs400-ds-delay = <0x14014>; max-frequency = <200000000>; mmc-hs200-1_8v; mmc-hs400-1_8v; no-sd; no-sdio; non-removable; pinctrl-names = "default", "state_uhs"; pinctrl-0 = <&mmc0_pins_default>; pinctrl-1 = <&mmc0_pins_uhs>; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_1p8v>; status = "okay"; card@0 { compatible = "mmc-card"; reg = <0>; block { compatible = "block-device"; partitions { block-partition-factory { partname = "factory"; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x1000>; }; macaddr_factory_24: macaddr@24 { compatible = "mac-base"; reg = <0x24 0x6>; #nvmem-cell-cells = <1>; }; macaddr_factory_2a: macaddr@2a { compatible = "mac-base"; reg = <0x2a 0x6>; #nvmem-cell-cells = <1>; }; }; }; emmc_rootdisk: block-partition-production { partname = "production"; }; }; }; }; }; &pio { mmc0_pins_default: mmc0-pins-default { mux { function = "emmc"; groups = "emmc_51"; }; conf-cmd-dat { pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; input-enable; drive-strength = <4>; mediatek,pull-up-adv = <1>; }; conf-clk { pins = "EMMC_CK"; drive-strength = <6>; mediatek,pull-down-adv = <2>; }; conf-ds { pins = "EMMC_DSL"; mediatek,pull-down-adv = <2>; }; conf-rst { pins = "EMMC_RSTB"; drive-strength = <4>; mediatek,pull-up-adv = <1>; }; }; mmc0_pins_uhs: mmc0-uhs-pins { mux { function = "emmc"; groups = "emmc_51"; }; conf-cmd-dat { pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; input-enable; drive-strength = <4>; mediatek,pull-up-adv = <1>; }; conf-clk { pins = "EMMC_CK"; drive-strength = <6>; mediatek,pull-down-adv = <2>; }; conf-ds { pins = "EMMC_DSL"; mediatek,pull-down-adv = <2>; }; conf-rst { pins = "EMMC_RSTB"; drive-strength = <4>; mediatek,pull-up-adv = <1>; }; }; wf_2g_5g_pins: wf-2g-5g-pins { mux { function = "wifi"; groups = "wf_2g", "wf_5g"; }; conf { pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4", "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6", "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10", "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1", "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0", "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8", "WF1_TOP_CLK", "WF1_TOP_DATA"; drive-strength = <4>; }; }; }; &switch { ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; label = "lan1"; }; port@2 { reg = <2>; label = "lan2"; }; port@3 { reg = <3>; label = "lan3"; }; port@4 { reg = <4>; label = "lan4"; }; port@6 { reg = <6>; ethernet = <&gmac0>; phy-mode = "2500base-x"; fixed-link { speed = <2500>; full-duplex; pause; }; }; }; }; &trng { status = "okay"; }; &uart0 { status = "okay"; }; &watchdog { status = "okay"; }; &wifi { nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; pinctrl-names = "default"; pinctrl-0 = <&wf_2g_5g_pins>; status = "okay"; };