// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "mt7621.dtsi" #include #include / { compatible = "jcg,y2", "mediatek,mt7621-soc"; model = "JCG Y2"; aliases { led-boot = &led_internet; led-failsafe = &led_internet; led-upgrade = &led_internet; }; leds { compatible = "gpio-leds"; led_internet: internet { label = "blue:internet"; gpios = <&gpio 15 GPIO_ACTIVE_LOW>; }; }; keys { compatible = "gpio-keys"; reset { label = "reset"; gpios = <&gpio 18 GPIO_ACTIVE_LOW>; linux,code = ; }; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <50000000>; m25p,fast-read; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "bootloader"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "config"; reg = <0x30000 0x10000>; read-only; }; partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x4da8>; }; macaddr_factory_e000: macaddr@e000 { reg = <0xe000 0x6>; }; macaddr_factory_e006: macaddr@e006 { reg = <0xe006 0x6>; }; }; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0xfb0000>; }; }; }; }; &pcie { status = "okay"; }; &pcie0 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; }; }; &gmac0 { nvmem-cells = <&macaddr_factory_e000>; nvmem-cell-names = "mac-address"; }; &gmac1 { status = "okay"; label = "wan"; phy-handle = <ðphy4>; nvmem-cells = <&macaddr_factory_e006>; nvmem-cell-names = "mac-address"; }; ðphy4 { /delete-property/ interrupts; }; &switch0 { ports { port@0 { status = "okay"; label = "lan4"; }; port@1 { status = "okay"; label = "lan3"; }; port@2 { status = "okay"; label = "lan2"; }; port@3 { status = "okay"; label = "lan1"; }; }; }; &state_default { gpio { groups = "jtag", "wdt"; function = "gpio"; }; };