// SPDX-License-Identifier: GPL-2.0-or-later OR MIT #include "mt7628an.dtsi" #include #include #include / { compatible = "wavlink,wl-wn577a2", "maginon,wlr-755", "mediatek,mt7628an-soc"; model = "WAVLINK WL-WN577A2"; aliases { led-boot = &led_wps; led-failsafe = &led_wps; led-running = &led_wps; led-upgrade = &led_wps; }; keys { compatible = "gpio-keys"; reset { label = "reset"; gpios = <&gpio 43 GPIO_ACTIVE_LOW>; linux,code = ; }; wps { label = "wps"; gpios = <&gpio 38 GPIO_ACTIVE_LOW>; linux,code = ; }; }; leds { compatible = "gpio-leds"; lan { function = LED_FUNCTION_LAN; color = ; gpios = <&gpio 40 GPIO_ACTIVE_LOW>; }; wan { function = LED_FUNCTION_WAN; color = ; gpios = <&gpio 39 GPIO_ACTIVE_LOW>; }; led_wps: wps { function = LED_FUNCTION_WPS; color = ; gpios = <&gpio 4 GPIO_ACTIVE_LOW>; }; }; }; &state_default { gpio { groups = "i2c", "wdt", "p0led_an", "p3led_an", "p4led_an"; function = "gpio"; }; }; &pcie { status = "okay"; }; &pcie0 { mt76@0,0 { reg = <0x0000 0 0 0 0>; nvmem-cells = <&eeprom_factory_8000>; nvmem-cell-names = "eeprom"; ieee80211-freq-limit = <5000000 6000000>; }; }; &spi0 { status = "okay"; flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "u-boot"; reg = <0x0 0x30000>; read-only; }; partition@30000 { label = "u-boot-env"; reg = <0x30000 0x10000>; read-only; }; partition@40000 { label = "factory"; reg = <0x40000 0x10000>; read-only; nvmem-layout { compatible = "fixed-layout"; #address-cells = <1>; #size-cells = <1>; eeprom_factory_0: eeprom@0 { reg = <0x0 0x400>; }; eeprom_factory_8000: eeprom@8000 { reg = <0x8000 0x200>; }; macaddr_factory_28: macaddr@28 { reg = <0x28 0x6>; }; }; }; partition@50000 { compatible = "denx,uimage"; label = "firmware"; reg = <0x50000 0x7b0000>; }; }; }; }; &wmac { status = "okay"; nvmem-cells = <&eeprom_factory_0>; nvmem-cell-names = "eeprom"; }; ðernet { nvmem-cells = <&macaddr_factory_28>; nvmem-cell-names = "mac-address"; }; &esw { mediatek,portmap = <0x2f>; }; &usbphy { status = "disabled"; }; &ehci { status = "disabled"; }; &ohci { status = "disabled"; };