// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks */ /dts-v1/; #include #include #include "imx8mp.dtsi" #include "imx8mp-beacon-som.dtsi" / { model = "Beacon EmbeddedWorks i.MX8MPlus Development kit"; compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp"; aliases { ethernet0 = &eqos; ethernet1 = &fec; }; chosen { stdout-path = &uart2; }; connector { compatible = "usb-c-connector"; label = "USB-C"; data-role = "dual"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; hs_ep: endpoint { remote-endpoint = <&usb3_hs_ep>; }; }; port@1 { reg = <1>; ss_ep: endpoint { remote-endpoint = <&hd3ss3220_in_ep>; }; }; }; }; gpio-keys { compatible = "gpio-keys"; autorepeat; button-0 { label = "btn0"; linux,code = ; gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; wakeup-source; }; button-1 { label = "btn1"; linux,code = ; gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; wakeup-source; }; button-2 { label = "btn2"; linux,code = ; gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; wakeup-source; }; button-3 { label = "btn3"; linux,code = ; gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; wakeup-source; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_led3>; led-0 { label = "gen_led0"; gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-1 { label = "gen_led1"; gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-2 { label = "gen_led2"; gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>; default-state = "off"; }; led-3 { label = "heartbeat"; gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; linux,default-trigger = "heartbeat"; }; }; pcie0_refclk: clock-pcie { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <100000000>; }; reg_audio: regulator-wm8962 { compatible = "regulator-fixed"; regulator-name = "3v3_aud"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_usdhc2_vmmc: regulator-usdhc2 { compatible = "regulator-fixed"; regulator-name = "VSD_3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; startup-delay-us = <100>; off-on-delay-us = <20000>; }; reg_usb1_host_vbus: regulator-usb1-vbus { compatible = "regulator-fixed"; regulator-name = "usb1_host_vbus"; regulator-max-microvolt = <5000000>; regulator-min-microvolt = <5000000>; gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>; enable-active-high; }; sound-wm8962 { compatible = "simple-audio-card"; simple-audio-card,name = "wm8962"; simple-audio-card,format = "i2s"; simple-audio-card,widgets = "Headphone", "Headphones", "Microphone", "Headset Mic", "Speaker", "Speaker"; simple-audio-card,routing = "Headphones", "HPOUTL", "Headphones", "HPOUTR", "Speaker", "SPKOUTL", "Speaker", "SPKOUTR", "Headset Mic", "MICBIAS", "IN3R", "Headset Mic"; simple-audio-card,cpu { sound-dai = <&sai3>; frame-master; bitclock-master; }; simple-audio-card,codec { sound-dai = <&wm8962>; }; }; }; &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; status = "okay"; tpm: tpm@0 { compatible = "infineon,slb9670"; reg = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tpm>; reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; spi-max-frequency = <18500000>; }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fec>; phy-mode = "rgmii-id"; phy-handle = <ðphy1>; fsl,magic-packet; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy1: ethernet-phy@3 { compatible = "ethernet-phy-id0022.1640", "ethernet-phy-ieee802.3-c22"; reg = <3>; reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; reset-deassert-us = <150000>; interrupt-parent = <&gpio4>; interrupts = <2 IRQ_TYPE_LEVEL_LOW>; }; }; }; &flexcan1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_flexcan1>; status = "okay"; }; &gpio2 { usb-mux-hog { gpio-hog; gpios = <20 0>; output-low; line-name = "USB-C Mux En"; }; }; &i2c2 { clock-frequency = <384000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; pca6416_3: gpio@20 { compatible = "nxp,pcal6416"; reg = <0x20>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gpio4>; interrupts = <27 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; }; }; &i2c3 { /* Connected to USB Hub */ usb-typec@52 { compatible = "nxp,ptn5110"; reg = <0x52>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_typec>; interrupt-parent = <&gpio4>; interrupts = <1 IRQ_TYPE_LEVEL_LOW>; connector { compatible = "usb-c-connector"; label = "USB-C"; power-role = "source"; data-role = "host"; source-pdos = ; }; }; }; &i2c4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; clock-frequency = <384000>; status = "okay"; wm8962: audio-codec@1a { compatible = "wlf,wm8962"; reg = <0x1a>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wm8962>; clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>; assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>; assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; assigned-clock-rates = <22576000>; DCVDD-supply = <®_audio>; DBVDD-supply = <®_audio>; AVDD-supply = <®_audio>; CPVDD-supply = <®_audio>; MICVDD-supply = <®_audio>; PLLVDD-supply = <®_audio>; SPKVDD1-supply = <®_audio>; SPKVDD2-supply = <®_audio>; gpio-cfg = < 0x0000 /* 0:Default */ 0x0000 /* 1:Default */ 0x0000 /* 2:FN_DMICCLK */ 0x0000 /* 3:Default */ 0x0000 /* 4:FN_DMICCDAT */ 0x0000 /* 5:Default */ >; #sound-dai-cells = <0>; }; pca6416: gpio@20 { compatible = "nxp,pcal6416"; reg = <0x20>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcal6414>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gpio4>; interrupts = <27 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; }; pca6416_1: gpio@21 { compatible = "nxp,pcal6416"; reg = <0x21>; gpio-controller; #gpio-cells = <2>; interrupt-parent = <&gpio4>; interrupts = <27 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; usb-hub-hog { gpio-hog; gpios = <7 0>; output-low; line-name = "USB Hub Enable"; }; }; usb-typec@47 { compatible = "ti,hd3ss3220"; reg = <0x47>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hd3ss3220>; interrupt-parent = <&gpio4>; interrupts = <19 IRQ_TYPE_LEVEL_LOW>; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; hd3ss3220_in_ep: endpoint { remote-endpoint = <&ss_ep>; }; }; port@1 { reg = <1>; hd3ss3220_out_ep: endpoint { remote-endpoint = <&usb3_role_switch>; }; }; }; }; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>; status = "okay"; }; &pcie_phy { fsl,refclk-pad-mode = ; clocks = <&pcie0_refclk>; clock-names = "ref"; status = "okay"; }; &sai3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_sai3>; assigned-clocks = <&clk IMX8MP_CLK_SAI3>; assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>; assigned-clock-rates = <12288000>; fsl,sai-mclk-direction-output; status = "okay"; }; &snvs_pwrkey { status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MP_CLK_UART3>; assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; uart-has-rtscts; status = "okay"; }; &usb3_0 { status = "okay"; }; &usb_dwc3_0 { dr_mode = "otg"; hnp-disable; srp-disable; adp-disable; usb-role-switch; status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; usb3_hs_ep: endpoint { remote-endpoint = <&hs_ep>; }; }; port@1 { reg = <1>; usb3_role_switch: endpoint { remote-endpoint = <&hd3ss3220_out_ep>; }; }; }; }; &usb3_phy0 { vbus-supply = <®_usb1_host_vbus>; status = "okay"; }; &usb3_1 { status = "okay"; }; &usb_dwc3_1 { dr_mode = "host"; status = "okay"; }; &usb3_phy1 { status = "okay"; }; &usdhc2 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; vmmc-supply = <®_usdhc2_vmmc>; bus-width = <4>; status = "okay"; }; &iomuxc { pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000 >; }; pinctrl_fec: fecgrp { fsl,pins = < MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10 >; }; pinctrl_flexcan1: flexcan1grp { fsl,pins = < MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 >; }; pinctrl_hd3ss3220: hd3ss3220grp { fsl,pins = < MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 >; }; pinctrl_i2c4: i2c4grp { fsl,pins = < MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2 >; }; pinctrl_led3: led3grp { fsl,pins = < MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41 >; }; pinctrl_pcal6414: pcal6414-gpiogrp { fsl,pins = < MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */ MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */ >; }; pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 >; }; pinctrl_sai3: sai3grp { fsl,pins = < MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6 MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6 MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6 MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6 MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6 >; }; pinctrl_tpm: tpmgrp { fsl,pins = < MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */ MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */ >; }; pinctrl_typec: typec1grp { fsl,pins = < MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140 >; }; pinctrl_uart3: uart3grp { fsl,pins = < MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 >; }; pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 >; }; pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 >; }; pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins = < MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 >; }; pinctrl_wm8962: wm8962grp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59 >; }; };