From a1d3defcca200077e1e382fe049ca613d16efd2b Mon Sep 17 00:00:00 2001 From: Cavon Lee Date: Tue, 18 Jun 2024 14:01:23 +0800 Subject: [PATCH 1136/1145] feat: Add support for SunFounder PiPower 3 overlay fix: Fix wrong Pironman 5 ir default pin number fix: Change space indentation to tab Signed-off-by: Cavon Lee --- arch/arm/boot/dts/overlays/Makefile | 1 + arch/arm/boot/dts/overlays/README | 8 +- .../overlays/sunfounder-pipower3-overlay.dts | 44 ++++++++++ .../overlays/sunfounder-pironman5-overlay.dts | 88 ++++++++++--------- 4 files changed, 98 insertions(+), 43 deletions(-) create mode 100644 arch/arm/boot/dts/overlays/sunfounder-pipower3-overlay.dts --- a/arch/arm/boot/dts/overlays/Makefile +++ b/arch/arm/boot/dts/overlays/Makefile @@ -275,6 +275,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \ ssd1306-spi.dtbo \ ssd1331-spi.dtbo \ ssd1351-spi.dtbo \ + sunfounder-pipower3.dtbo \ sunfounder-pironman5.dtbo \ superaudioboard.dtbo \ sx150x.dtbo \ --- a/arch/arm/boot/dts/overlays/README +++ b/arch/arm/boot/dts/overlays/README @@ -4695,11 +4695,17 @@ Params: speed SPI bus reset_pin GPIO pin for RESET (default 25) +Name: sunfounder-pipower3 +Info: Overlay for SunFounder PiPower 3 +Load: dtoverlay=sunfounder-pipower3,= +Params: poweroff_pin Change poweroff pin (default 26) + + Name: sunfounder-pironman5 Info: Overlay for SunFounder Pironman 5 Load: dtoverlay=sunfounder-pironman5,= Params: ir Enable IR or not (on or off, default on) - ir_pins Change IR receiver pin (default 12) + ir_pins Change IR receiver pin (default 13) Name: superaudioboard --- /dev/null +++ b/arch/arm/boot/dts/overlays/sunfounder-pipower3-overlay.dts @@ -0,0 +1,44 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "brcm,bcm2835"; + + fragment@0 { + target-path = "/chosen"; + __overlay__ { + power: power { + hat_current_supply = <5000>; + }; + }; + }; + fragment@1 { + target = <&i2c1>; + __overlay__ { + status = "okay"; + }; + }; + fragment@2 { + target-path = "/"; + __overlay__ { + power_ctrl: power_ctrl { + compatible = "gpio-poweroff"; + gpios = <&gpio 26 0>; + force; + }; + }; + }; + fragment@3 { + target = <&gpio>; + __overlay__ { + power_ctrl_pins: power_ctrl_pins { + brcm,pins = <26>; + brcm,function = <1>; // out + }; + }; + }; + __overrides__ { + poweroff_pin = <&power_ctrl>,"gpios:4", + <&power_ctrl_pins>,"brcm,pins:0"; + }; +}; --- a/arch/arm/boot/dts/overlays/sunfounder-pironman5-overlay.dts +++ b/arch/arm/boot/dts/overlays/sunfounder-pironman5-overlay.dts @@ -2,50 +2,54 @@ /plugin/; / { - compatible = "brcm,bcm2835"; + compatible = "brcm,bcm2835"; - fragment@0 { - target = <&i2c1>; - __overlay__ { - status = "okay"; - }; - }; - fragment@1 { - target = <&spi0>; - __overlay__ { - status = "okay"; - }; - }; - fragment@2 { - target-path = "/"; - __overlay__ { - gpio_ir: ir-receiver@c { - compatible = "gpio-ir-receiver"; - pinctrl-names = "default"; - pinctrl-0 = <&gpio_ir_pins>; + fragment@0 { + target = <&i2c1>; + __overlay__ { + status = "okay"; + }; + }; + fragment@1 { + target = <&spi0>; + __overlay__ { + status = "okay"; + }; + }; + fragment@2 { + target-path = "/"; + __overlay__ { + gpio_ir: ir-receiver@d { + compatible = "gpio-ir-receiver"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_ir_pins>; - // pin number, high or low - gpios = <&gpio 12 1>; + // pin number, high or low + gpios = <&gpio 13 1>; - // parameter for keymap name - linux,rc-map-name = "rc-rc6-mce"; + // parameter for keymap name + linux,rc-map-name = "rc-rc6-mce"; - status = "okay"; - }; - }; - }; - fragment@3 { - target = <&gpio>; - __overlay__ { - gpio_ir_pins: gpio_ir_pins@c { - brcm,pins = <12>; - brcm,function = <0>; - brcm,pull = <2>; - }; - }; - }; - __overrides__ { - ir = <&gpio_ir>,"status"; - ir_pins = <&gpio_ir>,"gpios:4", <&gpio_ir>,"reg:0", <&gpio_ir_pins>,"brcm,pins:0", <&gpio_ir_pins>,"reg:0"; - }; + status = "okay"; + }; + }; + }; + fragment@3 { + target = <&gpio>; + __overlay__ { + gpio_ir_pins: gpio_ir_pins@d { + brcm,pins = <13>; + brcm,function = <0>; + brcm,pull = <2>; + }; + }; + }; + __overrides__ { + ir = <&gpio_ir>,"status"; + ir_pins = + <&gpio_ir>,"gpios:4", + <&gpio_ir>,"reg:0", + <&gpio_ir_pins>,"brcm,pins:0", + <&gpio_ir_pins>,"reg:0"; + }; };