From 10c77e119eaaa2677009dea58cf69a8e5383925b Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Wed, 17 Jul 2024 17:27:36 +0100 Subject: [PATCH 1180/1215] arm64: dts: Move bcm2712 and rp1 here It is pointless having the bcm2712 family of dts files and rp1.dtsi in the arch/arm directory tree, since they then require placeholders to include them in arch/arm64 where they are built. The files have no dependencies on other files in the arch/arm tree, so simply move them here. Signed-off-by: Phil Elwell --- .../arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts | 867 ------------------ .../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts | 20 - .../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts | 10 - .../boot/dts/broadcom/bcm2712d0-rpi-5-b.dts | 107 --- .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 867 +++++++++++++++++- .../dts/broadcom/bcm2712-rpi-cm5-cm4io.dts | 20 +- .../dts/broadcom/bcm2712-rpi-cm5-cm5io.dts | 10 +- .../boot/dts/broadcom/bcm2712-rpi-cm5.dtsi | 10 +- .../boot/dts/broadcom/bcm2712-rpi.dtsi | 0 .../boot/dts/broadcom/bcm2712.dtsi | 0 .../boot/dts/broadcom/bcm2712d0-rpi-5-b.dts | 107 ++- .../{arm => arm64}/boot/dts/broadcom/rp1.dtsi | 0 12 files changed, 1002 insertions(+), 1016 deletions(-) delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts delete mode 100644 arch/arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts rename arch/{arm => arm64}/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi (98%) rename arch/{arm => arm64}/boot/dts/broadcom/bcm2712-rpi.dtsi (100%) rename arch/{arm => arm64}/boot/dts/broadcom/bcm2712.dtsi (100%) rename arch/{arm => arm64}/boot/dts/broadcom/rp1.dtsi (100%) --- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ /dev/null @@ -1,867 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/dts-v1/; - -#include -#include -#include -#include -#include -#include - -#define i2c0 _i2c0 -#define i2c3 _i2c3 -#define i2c4 _i2c4 -#define i2c5 _i2c5 -#define i2c6 _i2c6 -#define i2c8 _i2c8 -#define i2s _i2s -#define pwm0 _pwm0 -#define pwm1 _pwm1 -#define spi0 _spi0 -#define spi3 _spi3 -#define spi4 _spi4 -#define spi5 _spi5 -#define spi6 _spi6 -#define uart0 _uart0 -#define uart2 _uart2 -#define uart5 _uart5 - -#include "bcm2712.dtsi" - -#undef i2c0 -#undef i2c3 -#undef i2c4 -#undef i2c5 -#undef i2c6 -#undef i2c8 -#undef i2s -#undef pwm0 -#undef pwm1 -#undef spi0 -#undef spi3 -#undef spi4 -#undef spi5 -#undef spi6 -#undef uart0 -#undef uart2 -#undef uart3 -#undef uart4 -#undef uart5 - -/ { - compatible = "raspberrypi,5-model-b", "brcm,bcm2712"; - model = "Raspberry Pi 5"; - - /* Will be filled by the bootloader */ - memory@0 { - device_type = "memory"; - reg = <0 0 0x28000000>; - }; - - leds: leds { - compatible = "gpio-leds"; - - led_pwr: led-pwr { - label = "PWR"; - gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>; - default-state = "off"; - linux,default-trigger = "none"; - }; - - led_act: led-act { - label = "ACT"; - gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>; - default-state = "off"; - linux,default-trigger = "mmc0"; - }; - }; - - sd_io_1v8_reg: sd_io_1v8_reg { - compatible = "regulator-gpio"; - regulator-name = "vdd-sd-io"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - regulator-settling-time-us = <5000>; - gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>; - states = <1800000 0x1 - 3300000 0x0>; - status = "okay"; - }; - - sd_vcc_reg: sd_vcc_reg { - compatible = "regulator-fixed"; - regulator-name = "vcc-sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - enable-active-high; - gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - wl_on_reg: wl_on_reg { - compatible = "regulator-fixed"; - regulator-name = "wl-on-regulator"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-0 = <&wl_on_pins>; - pinctrl-names = "default"; - - gpio = <&gio 28 GPIO_ACTIVE_HIGH>; - - startup-delay-us = <150000>; - enable-active-high; - }; - - clocks: clocks { - }; - - cam1_clk: cam1_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - status = "disabled"; - }; - - cam0_clk: cam0_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - status = "disabled"; - }; - - cam0_reg: cam0_reg { - compatible = "regulator-fixed"; - regulator-name = "cam0_reg"; - enable-active-high; - status = "okay"; - gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector - }; - - cam1_reg: cam1_reg { - compatible = "regulator-fixed"; - regulator-name = "cam1_reg"; - enable-active-high; - status = "okay"; - gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector - }; - - cam_dummy_reg: cam_dummy_reg { - compatible = "regulator-fixed"; - regulator-name = "cam-dummy-reg"; - status = "okay"; - }; - - dummy: dummy { - // A target for unwanted overlay fragments - }; - - - // A few extra labels to keep overlays happy - - i2c0if: i2c0if {}; - i2c0mux: i2c0mux {}; -}; - -rp1_target: &pcie2 { - brcm,enable-mps-rcb; - brcm,vdm-qos-map = <0xbbaa9888>; - aspm-no-l0s; - status = "okay"; -}; - -&pcie1 { - brcm,vdm-qos-map = <0x33333333>; -}; - -// Add some labels to 2712 device - -// The system UART -uart10: &_uart0 { status = "okay"; }; - -// The system SPI for the bootloader EEPROM -spi10: &_spi0 { status = "okay"; }; - -i2c_rp1boot: &_i2c3 { }; - -#include "rp1.dtsi" - -&rp1 { - // PCIe address space layout: - // 00_00000000-00_00xxxxxx = RP1 peripherals - // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM - - // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx - // This is the RP1 peripheral space - ranges = <0xc0 0x40000000 - 0x02000000 0x00 0x00000000 - 0x00 0x00400000>; - - dma-ranges = - // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx - <0x10 0x00000000 - 0x43000000 0x10 0x00000000 - 0x10 0x00000000>, - - // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx - // This allows the RP1 DMA controller to address RP1 hardware - <0xc0 0x40000000 - 0x02000000 0x0 0x00000000 - 0x0 0x00400000>, - - // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx - <0x00 0x00000000 - 0x02000000 0x10 0x00000000 - 0x10 0x00000000>; -}; - -// Expose RP1 nodes as system nodes with labels - -&rp1_dma { - status = "okay"; -}; - -&rp1_eth { - status = "okay"; - phy-handle = <&phy1>; - phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; - phy-reset-duration = <5>; - - phy1: ethernet-phy@1 { - reg = <0x1>; - brcm,powerdown-enable; - }; -}; - -gpio: &rp1_gpio { - status = "okay"; -}; - -aux: &dummy {}; - -&rp1_usb0 { - pinctrl-0 = <&usb_vbus_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rp1_usb1 { - status = "okay"; -}; - -#include "bcm2712-rpi.dtsi" - -i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only - pinctrl-0 = <&rp1_i2c6_38_39>; - pinctrl-names = "default"; - clock-frequency = <100000>; -}; - -i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only - pinctrl-0 = <&rp1_i2c4_40_41>; - pinctrl-names = "default"; - clock-frequency = <100000>; -}; - -i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility - -csi0: &rp1_csi0 { }; -csi1: &rp1_csi1 { }; -dsi0: &rp1_dsi0 { }; -dsi1: &rp1_dsi1 { }; -dpi: &rp1_dpi { }; -vec: &rp1_vec { }; -dpi_gpio0: &rp1_dpi_24bit_gpio0 { }; -dpi_gpio1: &rp1_dpi_24bit_gpio2 { }; -dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { }; -dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { }; -dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { }; -dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { }; -dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { }; -dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { }; -dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { }; -dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; - -/* Add the IOMMUs for some RP1 bus masters */ - -&csi0 { - iommus = <&iommu5>; -}; - -&csi1 { - iommus = <&iommu5>; -}; - -&dsi0 { - iommus = <&iommu5>; -}; - -&dsi1 { - iommus = <&iommu5>; -}; - -&dpi { - iommus = <&iommu5>; -}; - -&vec { - iommus = <&iommu5>; -}; - -&ddc0 { - status = "disabled"; -}; - -&ddc1 { - status = "disabled"; -}; - -&hdmi0 { - clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; - clock-names = "hdmi", "bvb", "audio", "cec"; - status = "disabled"; -}; - -&hdmi1 { - clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; - clock-names = "hdmi", "bvb", "audio", "cec"; - status = "disabled"; -}; - -&hvs { - clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; - clock-names = "core", "disp"; -}; - -&mop { - status = "disabled"; -}; - -&moplet { - status = "disabled"; -}; - -&pixelvalve0 { - status = "disabled"; -}; - -&pixelvalve1 { - status = "disabled"; -}; - -&disp_intr { - status = "disabled"; -}; - -/* SDIO1 is used to drive the SD card */ -&sdio1 { - pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>; - pinctrl-names = "default"; - vqmmc-supply = <&sd_io_1v8_reg>; - vmmc-supply = <&sd_vcc_reg>; - bus-width = <4>; - sd-uhs-sdr50; - sd-uhs-ddr50; - sd-uhs-sdr104; - cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; - //no-1-8-v; - status = "okay"; -}; - -&pinctrl_aon { - emmc_aon_cd_pins: emmc_aon_cd_pins { - function = "sd_card_g"; - pins = "aon_gpio5"; - bias-pull-up; - }; - - /* Slight hack - only one PWM pin (status LED) is usable */ - aon_pwm_1pin: aon_pwm_1pin { - function = "aon_pwm"; - pins = "aon_gpio9"; - }; -}; - -&pinctrl { - pwr_button_pins: pwr_button_pins { - function = "gpio"; - pins = "gpio20"; - bias-pull-up; - }; - - wl_on_pins: wl_on_pins { - function = "gpio"; - pins = "gpio28"; - }; - - bt_shutdown_pins: bt_shutdown_pins { - function = "gpio"; - pins = "gpio29"; - }; - - emmc_sd_pulls: emmc_sd_pulls { - pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; - bias-pull-up; - }; -}; - -/* uarta communicates with the BT module */ -&uarta { - uart-has-rtscts; - auto-flow-control; - status = "okay"; - clock-frequency = <96000000>; - pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>; - pinctrl-names = "default"; - - bluetooth: bluetooth { - compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; - shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; - local-bd-address = [ 00 00 00 00 00 00 ]; - }; -}; - -&i2c_rp1boot { - clock-frequency = <400000>; - pinctrl-0 = <&i2c3_m4_agpio0_pins>; - pinctrl-names = "default"; -}; - -/ { - chosen: chosen { - bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe"; - stdout-path = "serial10:115200n8"; - }; - - fan: cooling_fan { - status = "disabled"; - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <3>; - cooling-levels = <0 75 125 175 250>; - pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>; - rpm-regmap = <&rp1_pwm1>; - rpm-offset = <0x3c>; - }; - - pwr_button { - compatible = "gpio-keys"; - - pinctrl-names = "default"; - pinctrl-0 = <&pwr_button_pins>; - status = "okay"; - - pwr_key: pwr { - label = "pwr_button"; - // linux,code = <205>; // KEY_SUSPEND - linux,code = <116>; // KEY_POWER - gpios = <&gio 20 GPIO_ACTIVE_LOW>; - debounce-interval = <50>; // ms - }; - }; -}; - -&usb { - power-domains = <&power RPI_POWER_DOMAIN_USB>; -}; - -/* SDIO2 drives the WLAN interface */ -&sdio2 { - pinctrl-0 = <&sdio2_30_pins>; - pinctrl-names = "default"; - bus-width = <4>; - vmmc-supply = <&wl_on_reg>; - sd-uhs-ddr50; - non-removable; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - wifi: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - local-mac-address = [00 00 00 00 00 00]; - }; -}; - -&rpivid { - status = "okay"; -}; - -&pinctrl { - spi10_gpio2: spi10_gpio2 { - function = "vc_spi0"; - pins = "gpio2", "gpio3", "gpio4"; - bias-disable; - }; - - spi10_cs_gpio1: spi10_cs_gpio1 { - function = "gpio"; - pins = "gpio1"; - bias-pull-up; - }; -}; - -spi10_pins: &spi10_gpio2 {}; -spi10_cs_pins: &spi10_cs_gpio1 {}; - -&spi10 { - pinctrl-names = "default"; - cs-gpios = <&gio 1 1>; - pinctrl-0 = <&spi10_pins &spi10_cs_pins>; - - spidev10: spidev@0 { - compatible = "spidev"; - reg = <0>; /* CE0 */ - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <20000000>; - status = "okay"; - }; -}; - -// ============================================= -// Board specific stuff here - -&gio_aon { - // Don't use GIO_AON as an interrupt controller because it will - // clash with the firmware monitoring the PMIC interrupt via the VPU. - - /delete-property/ interrupt-controller; -}; - -&main_aon_irq { - // Don't use the MAIN_AON_IRQ interrupt controller because it will - // clash with the firmware monitoring the PMIC interrupt via the VPU. - - status = "disabled"; -}; - -&rp1_pwm1 { - status = "disabled"; - pinctrl-0 = <&rp1_pwm1_gpio45>; - pinctrl-names = "default"; -}; - -&thermal_trips { - cpu_tepid: cpu-tepid { - temperature = <50000>; - hysteresis = <5000>; - type = "active"; - }; - - cpu_warm: cpu-warm { - temperature = <60000>; - hysteresis = <5000>; - type = "active"; - }; - - cpu_hot: cpu-hot { - temperature = <67500>; - hysteresis = <5000>; - type = "active"; - }; - - cpu_vhot: cpu-vhot { - temperature = <75000>; - hysteresis = <5000>; - type = "active"; - }; -}; - -&cooling_maps { - tepid { - trip = <&cpu_tepid>; - cooling-device = <&fan 1 1>; - }; - - warm { - trip = <&cpu_warm>; - cooling-device = <&fan 2 2>; - }; - - hot { - trip = <&cpu_hot>; - cooling-device = <&fan 3 3>; - }; - - vhot { - trip = <&cpu_vhot>; - cooling-device = <&fan 4 4>; - }; - - melt { - trip = <&cpu_crit>; - cooling-device = <&fan 4 4>; - }; -}; - -&gio { - // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank - // to reduce the clutter in gpioinfo/pinctrl - brcm,gpio-bank-widths = <32 4>; - - gpio-line-names = - "-", // GPIO_000 - "2712_BOOT_CS_N", // GPIO_001 - "2712_BOOT_MISO", // GPIO_002 - "2712_BOOT_MOSI", // GPIO_003 - "2712_BOOT_SCLK", // GPIO_004 - "-", // GPIO_005 - "-", // GPIO_006 - "-", // GPIO_007 - "-", // GPIO_008 - "-", // GPIO_009 - "-", // GPIO_010 - "-", // GPIO_011 - "-", // GPIO_012 - "-", // GPIO_013 - "PCIE_SDA", // GPIO_014 - "PCIE_SCL", // GPIO_015 - "-", // GPIO_016 - "-", // GPIO_017 - "-", // GPIO_018 - "-", // GPIO_019 - "PWR_GPIO", // GPIO_020 - "2712_G21_FS", // GPIO_021 - "-", // GPIO_022 - "-", // GPIO_023 - "BT_RTS", // GPIO_024 - "BT_CTS", // GPIO_025 - "BT_TXD", // GPIO_026 - "BT_RXD", // GPIO_027 - "WL_ON", // GPIO_028 - "BT_ON", // GPIO_029 - "WIFI_SDIO_CLK", // GPIO_030 - "WIFI_SDIO_CMD", // GPIO_031 - "WIFI_SDIO_D0", // GPIO_032 - "WIFI_SDIO_D1", // GPIO_033 - "WIFI_SDIO_D2", // GPIO_034 - "WIFI_SDIO_D3"; // GPIO_035 -}; - -&gio_aon { - gpio-line-names = - "RP1_SDA", // AON_GPIO_00 - "RP1_SCL", // AON_GPIO_01 - "RP1_RUN", // AON_GPIO_02 - "SD_IOVDD_SEL", // AON_GPIO_03 - "SD_PWR_ON", // AON_GPIO_04 - "SD_CDET_N", // AON_GPIO_05 - "SD_FLG_N", // AON_GPIO_06 - "-", // AON_GPIO_07 - "2712_WAKE", // AON_GPIO_08 - "2712_STAT_LED", // AON_GPIO_09 - "-", // AON_GPIO_10 - "-", // AON_GPIO_11 - "PMIC_INT", // AON_GPIO_12 - "UART_TX_FS", // AON_GPIO_13 - "UART_RX_FS", // AON_GPIO_14 - "-", // AON_GPIO_15 - "-", // AON_GPIO_16 - - // Pad bank0 out to 32 entries - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - - "HDMI0_SCL", // AON_SGPIO_00 - "HDMI0_SDA", // AON_SGPIO_01 - "HDMI1_SCL", // AON_SGPIO_02 - "HDMI1_SDA", // AON_SGPIO_03 - "PMIC_SCL", // AON_SGPIO_04 - "PMIC_SDA"; // AON_SGPIO_05 - - rp1_run_hog { - gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "RP1 RUN pin"; - }; -}; - -&rp1_gpio { - gpio-line-names = - "ID_SDA", // GPIO0 - "ID_SCL", // GPIO1 - "GPIO2", // GPIO2 - "GPIO3", // GPIO3 - "GPIO4", // GPIO4 - "GPIO5", // GPIO5 - "GPIO6", // GPIO6 - "GPIO7", // GPIO7 - "GPIO8", // GPIO8 - "GPIO9", // GPIO9 - "GPIO10", // GPIO10 - "GPIO11", // GPIO11 - "GPIO12", // GPIO12 - "GPIO13", // GPIO13 - "GPIO14", // GPIO14 - "GPIO15", // GPIO15 - "GPIO16", // GPIO16 - "GPIO17", // GPIO17 - "GPIO18", // GPIO18 - "GPIO19", // GPIO19 - "GPIO20", // GPIO20 - "GPIO21", // GPIO21 - "GPIO22", // GPIO22 - "GPIO23", // GPIO23 - "GPIO24", // GPIO24 - "GPIO25", // GPIO25 - "GPIO26", // GPIO26 - "GPIO27", // GPIO27 - - "PCIE_RP1_WAKE", // GPIO28 - "FAN_TACH", // GPIO29 - "HOST_SDA", // GPIO30 - "HOST_SCL", // GPIO31 - "ETH_RST_N", // GPIO32 - "-", // GPIO33 - - "CD0_IO0_MICCLK", // GPIO34 - "CD0_IO0_MICDAT0", // GPIO35 - "RP1_PCIE_CLKREQ_N", // GPIO36 - "-", // GPIO37 - "CD0_SDA", // GPIO38 - "CD0_SCL", // GPIO39 - "CD1_SDA", // GPIO40 - "CD1_SCL", // GPIO41 - "USB_VBUS_EN", // GPIO42 - "USB_OC_N", // GPIO43 - "RP1_STAT_LED", // GPIO44 - "FAN_PWM", // GPIO45 - "CD1_IO0_MICCLK", // GPIO46 - "2712_WAKE", // GPIO47 - "CD1_IO1_MICDAT1", // GPIO48 - "EN_MAX_USB_CUR", // GPIO49 - "-", // GPIO50 - "-", // GPIO51 - "-", // GPIO52 - "-"; // GPIO53 - - usb_vbus_pins: usb_vbus_pins { - function = "vbus1"; - pins = "gpio42", "gpio43"; - }; -}; - -/ { - aliases: aliases { - blconfig = &blconfig; - blpubkey = &blpubkey; - bluetooth = &bluetooth; - console = &uart10; - ethernet0 = &rp1_eth; - wifi0 = &wifi; - fb = &fb; - mailbox = &mailbox; - mmc0 = &sdio1; - uart0 = &uart0; - uart1 = &uart1; - uart2 = &uart2; - uart3 = &uart3; - uart4 = &uart4; - uart10 = &uart10; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial10 = &uart10; - i2c = &i2c_arm; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c10 = &i2c_rp1boot; - // Bit-bashed i2c_gpios start at 10 - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &spi3; - spi4 = &spi4; - spi5 = &spi5; - spi10 = &spi10; - gpio0 = &gpio; - gpio1 = &gio; - gpio2 = &gio_aon; - gpio3 = &pinctrl; - gpio4 = &pinctrl_aon; - usb0 = &rp1_usb0; - usb1 = &rp1_usb1; - drm-dsi1 = &dsi0; - drm-dsi2 = &dsi1; - }; - - __overrides__ { - bdaddr = <&bluetooth>, "local-bd-address["; - button_debounce = <&pwr_key>, "debounce-interval:0"; - cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status"; - uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0; - i2c0 = <&i2c0>, "status"; - i2c1 = <&i2c1>, "status"; - i2c = <&i2c1>, "status"; - i2c_arm = <&i2c_arm>, "status"; - i2c_vc = <&i2c_vc>, "status"; - i2c_csi_dsi = <&i2c_csi_dsi>, "status"; - i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status"; - i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status"; - i2c0_baudrate = <&i2c0>, "clock-frequency:0"; - i2c1_baudrate = <&i2c1>, "clock-frequency:0"; - i2c_baudrate = <&i2c_arm>, "clock-frequency:0"; - i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0"; - i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0"; - krnbt = <&bluetooth>, "status"; - nvme = <&pciex1>, "status"; - pciex1 = <&pciex1>, "status"; - pciex1_gen = <&pciex1> , "max-link-speed:0"; - pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; - pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; - pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; - random = <&random>, "status"; - rtc = <&rpi_rtc>, "status"; - rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0"; - sd_cqe = <&sdio1>, "supports-cqe?"; - spi = <&spi0>, "status"; - suspend = <&pwr_key>, "linux,code:0=205"; - uart0 = <&uart0>, "status"; - wifiaddr = <&wifi>, "local-mac-address["; - - act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>; - act_led_activelow = <&led_act>,"gpios:8"; - act_led_trigger = <&led_act>, "linux,default-trigger"; - pwr_led_gpio = <&led_pwr>,"gpios:4"; - pwr_led_activelow = <&led_pwr>, "gpios:8"; - pwr_led_trigger = <&led_pwr>, "linux,default-trigger"; - eth_led0 = <&phy1>,"led-modes:0"; - eth_led1 = <&phy1>,"led-modes:4"; - drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0; - drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1; - drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi; - drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; - drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0; - drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1; - drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi; - drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; - drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0; - drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1; - drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi; - drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; - - fan_temp0 = <&cpu_tepid>,"temperature:0"; - fan_temp1 = <&cpu_warm>,"temperature:0"; - fan_temp2 = <&cpu_hot>,"temperature:0"; - fan_temp3 = <&cpu_vhot>,"temperature:0"; - fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0"; - fan_temp1_hyst = <&cpu_warm>,"hysteresis:0"; - fan_temp2_hyst = <&cpu_hot>,"hysteresis:0"; - fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0"; - fan_temp0_speed = <&fan>, "cooling-levels:4"; - fan_temp1_speed = <&fan>, "cooling-levels:8"; - fan_temp2_speed = <&fan>, "cooling-levels:12"; - fan_temp3_speed = <&fan>, "cooling-levels:16"; - }; -}; --- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts +++ /dev/null @@ -1,20 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/dts-v1/; - -#include "bcm2712-rpi-cm5.dtsi" - -// The RP1 USB3 interfaces are not usable on CM4IO - -&rp1_usb0 { - status = "disabled"; -}; - -&rp1_usb1 { - status = "disabled"; -}; - -/ { - __overrides__ { - i2c_csi_dsi = <&i2c_csi_dsi>, "status"; - }; -}; --- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts +++ /dev/null @@ -1,10 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/dts-v1/; - -#include "bcm2712-rpi-cm5.dtsi" - -/ { - __overrides__ { - i2c_csi_dsi = <&i2c_csi_dsi>, "status"; - }; -}; --- a/arch/arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts +++ /dev/null @@ -1,107 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include "bcm2712-rpi-5-b.dts" - -&gio { - brcm,gpio-bank-widths = <32 4>; - - gpio-line-names = - "", // GPIO_000 - "2712_BOOT_CS_N", // GPIO_001 - "2712_BOOT_MISO", // GPIO_002 - "2712_BOOT_MOSI", // GPIO_003 - "2712_BOOT_SCLK", // GPIO_004 - "", // GPIO_005 - "", // GPIO_006 - "", // GPIO_007 - "", // GPIO_008 - "", // GPIO_009 - "", // GPIO_010 - "", // GPIO_011 - "", // GPIO_012 - "", // GPIO_013 - "PCIE_SDA", // GPIO_014 - "PCIE_SCL", // GPIO_015 - "", // GPIO_016 - "", // GPIO_017 - "-", // GPIO_018 - "-", // GPIO_019 - "PWR_GPIO", // GPIO_020 - "2712_G21_FS", // GPIO_021 - "-", // GPIO_022 - "-", // GPIO_023 - "BT_RTS", // GPIO_024 - "BT_CTS", // GPIO_025 - "BT_TXD", // GPIO_026 - "BT_RXD", // GPIO_027 - "WL_ON", // GPIO_028 - "BT_ON", // GPIO_029 - "WIFI_SDIO_CLK", // GPIO_030 - "WIFI_SDIO_CMD", // GPIO_031 - "WIFI_SDIO_D0", // GPIO_032 - "WIFI_SDIO_D1", // GPIO_033 - "WIFI_SDIO_D2", // GPIO_034 - "WIFI_SDIO_D3"; // GPIO_035 -}; - -&gio_aon { - brcm,gpio-bank-widths = <15 6>; - - gpio-line-names = - "RP1_SDA", // AON_GPIO_00 - "RP1_SCL", // AON_GPIO_01 - "RP1_RUN", // AON_GPIO_02 - "SD_IOVDD_SEL", // AON_GPIO_03 - "SD_PWR_ON", // AON_GPIO_04 - "SD_CDET_N", // AON_GPIO_05 - "SD_FLG_N", // AON_GPIO_06 - "", // AON_GPIO_07 - "2712_WAKE", // AON_GPIO_08 - "2712_STAT_LED", // AON_GPIO_09 - "", // AON_GPIO_10 - "", // AON_GPIO_11 - "PMIC_INT", // AON_GPIO_12 - "UART_TX_FS", // AON_GPIO_13 - "UART_RX_FS", // AON_GPIO_14 - "", // AON_GPIO_15 - "", // AON_GPIO_16 - - // Pad bank0 out to 32 entries - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - - "HDMI0_SCL", // AON_SGPIO_00 - "HDMI0_SDA", // AON_SGPIO_01 - "HDMI1_SCL", // AON_SGPIO_02 - "HDMI1_SDA", // AON_SGPIO_03 - "PMIC_SCL", // AON_SGPIO_04 - "PMIC_SDA"; // AON_SGPIO_05 -}; - -&pinctrl { - compatible = "brcm,bcm2712d0-pinctrl"; - reg = <0x7d504100 0x20>; -}; - -&pinctrl_aon { - compatible = "brcm,bcm2712d0-aon-pinctrl"; - reg = <0x7d510700 0x1c>; -}; - -&vc4 { - compatible = "brcm,bcm2712d0-vc6"; -}; - -&uart10 { - interrupts = ; -}; - -&spi10 { - dmas = <&dma40 3>, <&dma40 4>; -}; - -&hdmi0 { - dmas = <&dma40 (12|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; -}; - -&hdmi1 { - dmas = <&dma40 (13|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; -}; --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts @@ -1,2 +1,867 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/broadcom/bcm2712-rpi-5-b.dts" +/dts-v1/; + +#include +#include +#include +#include +#include +#include + +#define i2c0 _i2c0 +#define i2c3 _i2c3 +#define i2c4 _i2c4 +#define i2c5 _i2c5 +#define i2c6 _i2c6 +#define i2c8 _i2c8 +#define i2s _i2s +#define pwm0 _pwm0 +#define pwm1 _pwm1 +#define spi0 _spi0 +#define spi3 _spi3 +#define spi4 _spi4 +#define spi5 _spi5 +#define spi6 _spi6 +#define uart0 _uart0 +#define uart2 _uart2 +#define uart5 _uart5 + +#include "bcm2712.dtsi" + +#undef i2c0 +#undef i2c3 +#undef i2c4 +#undef i2c5 +#undef i2c6 +#undef i2c8 +#undef i2s +#undef pwm0 +#undef pwm1 +#undef spi0 +#undef spi3 +#undef spi4 +#undef spi5 +#undef spi6 +#undef uart0 +#undef uart2 +#undef uart3 +#undef uart4 +#undef uart5 + +/ { + compatible = "raspberrypi,5-model-b", "brcm,bcm2712"; + model = "Raspberry Pi 5"; + + /* Will be filled by the bootloader */ + memory@0 { + device_type = "memory"; + reg = <0 0 0x28000000>; + }; + + leds: leds { + compatible = "gpio-leds"; + + led_pwr: led-pwr { + label = "PWR"; + gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "none"; + }; + + led_act: led-act { + label = "ACT"; + gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; + }; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-gpio"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-settling-time-us = <5000>; + gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1 + 3300000 0x0>; + status = "okay"; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wl_on_reg: wl_on_reg { + compatible = "regulator-fixed"; + regulator-name = "wl-on-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-0 = <&wl_on_pins>; + pinctrl-names = "default"; + + gpio = <&gio 28 GPIO_ACTIVE_HIGH>; + + startup-delay-us = <150000>; + enable-active-high; + }; + + clocks: clocks { + }; + + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_clk: cam0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_reg: cam0_reg { + compatible = "regulator-fixed"; + regulator-name = "cam0_reg"; + enable-active-high; + status = "okay"; + gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to MIPI 0 connector + }; + + cam1_reg: cam1_reg { + compatible = "regulator-fixed"; + regulator-name = "cam1_reg"; + enable-active-high; + status = "okay"; + gpio = <&rp1_gpio 46 0>; // CD1_IO0_MICCLK, to MIPI 1 connector + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; + + dummy: dummy { + // A target for unwanted overlay fragments + }; + + + // A few extra labels to keep overlays happy + + i2c0if: i2c0if {}; + i2c0mux: i2c0mux {}; +}; + +rp1_target: &pcie2 { + brcm,enable-mps-rcb; + brcm,vdm-qos-map = <0xbbaa9888>; + aspm-no-l0s; + status = "okay"; +}; + +&pcie1 { + brcm,vdm-qos-map = <0x33333333>; +}; + +// Add some labels to 2712 device + +// The system UART +uart10: &_uart0 { status = "okay"; }; + +// The system SPI for the bootloader EEPROM +spi10: &_spi0 { status = "okay"; }; + +i2c_rp1boot: &_i2c3 { }; + +#include "rp1.dtsi" + +&rp1 { + // PCIe address space layout: + // 00_00000000-00_00xxxxxx = RP1 peripherals + // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM + + // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx + // This is the RP1 peripheral space + ranges = <0xc0 0x40000000 + 0x02000000 0x00 0x00000000 + 0x00 0x00400000>; + + dma-ranges = + // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x10 0x00000000 + 0x43000000 0x10 0x00000000 + 0x10 0x00000000>, + + // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx + // This allows the RP1 DMA controller to address RP1 hardware + <0xc0 0x40000000 + 0x02000000 0x0 0x00000000 + 0x0 0x00400000>, + + // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x00 0x00000000 + 0x02000000 0x10 0x00000000 + 0x10 0x00000000>; +}; + +// Expose RP1 nodes as system nodes with labels + +&rp1_dma { + status = "okay"; +}; + +&rp1_eth { + status = "okay"; + phy-handle = <&phy1>; + phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; + phy-reset-duration = <5>; + + phy1: ethernet-phy@1 { + reg = <0x1>; + brcm,powerdown-enable; + }; +}; + +gpio: &rp1_gpio { + status = "okay"; +}; + +aux: &dummy {}; + +&rp1_usb0 { + pinctrl-0 = <&usb_vbus_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rp1_usb1 { + status = "okay"; +}; + +#include "bcm2712-rpi.dtsi" + +i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only + pinctrl-0 = <&rp1_i2c6_38_39>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c_csi_dsi1: &i2c4 { // Note: This is for MIPI1 connector only + pinctrl-0 = <&rp1_i2c4_40_41>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility + +csi0: &rp1_csi0 { }; +csi1: &rp1_csi1 { }; +dsi0: &rp1_dsi0 { }; +dsi1: &rp1_dsi1 { }; +dpi: &rp1_dpi { }; +vec: &rp1_vec { }; +dpi_gpio0: &rp1_dpi_24bit_gpio0 { }; +dpi_gpio1: &rp1_dpi_24bit_gpio2 { }; +dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { }; +dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { }; +dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { }; +dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { }; +dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { }; +dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { }; +dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { }; +dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; + +/* Add the IOMMUs for some RP1 bus masters */ + +&csi0 { + iommus = <&iommu5>; +}; + +&csi1 { + iommus = <&iommu5>; +}; + +&dsi0 { + iommus = <&iommu5>; +}; + +&dsi1 { + iommus = <&iommu5>; +}; + +&dpi { + iommus = <&iommu5>; +}; + +&vec { + iommus = <&iommu5>; +}; + +&ddc0 { + status = "disabled"; +}; + +&ddc1 { + status = "disabled"; +}; + +&hdmi0 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hdmi1 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hvs { + clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; + clock-names = "core", "disp"; +}; + +&mop { + status = "disabled"; +}; + +&moplet { + status = "disabled"; +}; + +&pixelvalve0 { + status = "disabled"; +}; + +&pixelvalve1 { + status = "disabled"; +}; + +&disp_intr { + status = "disabled"; +}; + +/* SDIO1 is used to drive the SD card */ +&sdio1 { + pinctrl-0 = <&emmc_sd_pulls>, <&emmc_aon_cd_pins>; + pinctrl-names = "default"; + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + bus-width = <4>; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + cd-gpios = <&gio_aon 5 GPIO_ACTIVE_LOW>; + //no-1-8-v; + status = "okay"; +}; + +&pinctrl_aon { + emmc_aon_cd_pins: emmc_aon_cd_pins { + function = "sd_card_g"; + pins = "aon_gpio5"; + bias-pull-up; + }; + + /* Slight hack - only one PWM pin (status LED) is usable */ + aon_pwm_1pin: aon_pwm_1pin { + function = "aon_pwm"; + pins = "aon_gpio9"; + }; +}; + +&pinctrl { + pwr_button_pins: pwr_button_pins { + function = "gpio"; + pins = "gpio20"; + bias-pull-up; + }; + + wl_on_pins: wl_on_pins { + function = "gpio"; + pins = "gpio28"; + }; + + bt_shutdown_pins: bt_shutdown_pins { + function = "gpio"; + pins = "gpio29"; + }; + + emmc_sd_pulls: emmc_sd_pulls { + pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3"; + bias-pull-up; + }; +}; + +/* uarta communicates with the BT module */ +&uarta { + uart-has-rtscts; + auto-flow-control; + status = "okay"; + clock-frequency = <96000000>; + pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>; + pinctrl-names = "default"; + + bluetooth: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + }; +}; + +&i2c_rp1boot { + clock-frequency = <400000>; + pinctrl-0 = <&i2c3_m4_agpio0_pins>; + pinctrl-names = "default"; +}; + +/ { + chosen: chosen { + bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe"; + stdout-path = "serial10:115200n8"; + }; + + fan: cooling_fan { + status = "disabled"; + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <3>; + cooling-levels = <0 75 125 175 250>; + pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>; + rpm-regmap = <&rp1_pwm1>; + rpm-offset = <0x3c>; + }; + + pwr_button { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwr_button_pins>; + status = "okay"; + + pwr_key: pwr { + label = "pwr_button"; + // linux,code = <205>; // KEY_SUSPEND + linux,code = <116>; // KEY_POWER + gpios = <&gio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; // ms + }; + }; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +/* SDIO2 drives the WLAN interface */ +&sdio2 { + pinctrl-0 = <&sdio2_30_pins>; + pinctrl-names = "default"; + bus-width = <4>; + vmmc-supply = <&wl_on_reg>; + sd-uhs-ddr50; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + local-mac-address = [00 00 00 00 00 00]; + }; +}; + +&rpivid { + status = "okay"; +}; + +&pinctrl { + spi10_gpio2: spi10_gpio2 { + function = "vc_spi0"; + pins = "gpio2", "gpio3", "gpio4"; + bias-disable; + }; + + spi10_cs_gpio1: spi10_cs_gpio1 { + function = "gpio"; + pins = "gpio1"; + bias-pull-up; + }; +}; + +spi10_pins: &spi10_gpio2 {}; +spi10_cs_pins: &spi10_cs_gpio1 {}; + +&spi10 { + pinctrl-names = "default"; + cs-gpios = <&gio 1 1>; + pinctrl-0 = <&spi10_pins &spi10_cs_pins>; + + spidev10: spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; + +// ============================================= +// Board specific stuff here + +&gio_aon { + // Don't use GIO_AON as an interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + /delete-property/ interrupt-controller; +}; + +&main_aon_irq { + // Don't use the MAIN_AON_IRQ interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + status = "disabled"; +}; + +&rp1_pwm1 { + status = "disabled"; + pinctrl-0 = <&rp1_pwm1_gpio45>; + pinctrl-names = "default"; +}; + +&thermal_trips { + cpu_tepid: cpu-tepid { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_warm: cpu-warm { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_hot: cpu-hot { + temperature = <67500>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_vhot: cpu-vhot { + temperature = <75000>; + hysteresis = <5000>; + type = "active"; + }; +}; + +&cooling_maps { + tepid { + trip = <&cpu_tepid>; + cooling-device = <&fan 1 1>; + }; + + warm { + trip = <&cpu_warm>; + cooling-device = <&fan 2 2>; + }; + + hot { + trip = <&cpu_hot>; + cooling-device = <&fan 3 3>; + }; + + vhot { + trip = <&cpu_vhot>; + cooling-device = <&fan 4 4>; + }; + + melt { + trip = <&cpu_crit>; + cooling-device = <&fan 4 4>; + }; +}; + +&gio { + // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank + // to reduce the clutter in gpioinfo/pinctrl + brcm,gpio-bank-widths = <32 4>; + + gpio-line-names = + "-", // GPIO_000 + "2712_BOOT_CS_N", // GPIO_001 + "2712_BOOT_MISO", // GPIO_002 + "2712_BOOT_MOSI", // GPIO_003 + "2712_BOOT_SCLK", // GPIO_004 + "-", // GPIO_005 + "-", // GPIO_006 + "-", // GPIO_007 + "-", // GPIO_008 + "-", // GPIO_009 + "-", // GPIO_010 + "-", // GPIO_011 + "-", // GPIO_012 + "-", // GPIO_013 + "PCIE_SDA", // GPIO_014 + "PCIE_SCL", // GPIO_015 + "-", // GPIO_016 + "-", // GPIO_017 + "-", // GPIO_018 + "-", // GPIO_019 + "PWR_GPIO", // GPIO_020 + "2712_G21_FS", // GPIO_021 + "-", // GPIO_022 + "-", // GPIO_023 + "BT_RTS", // GPIO_024 + "BT_CTS", // GPIO_025 + "BT_TXD", // GPIO_026 + "BT_RXD", // GPIO_027 + "WL_ON", // GPIO_028 + "BT_ON", // GPIO_029 + "WIFI_SDIO_CLK", // GPIO_030 + "WIFI_SDIO_CMD", // GPIO_031 + "WIFI_SDIO_D0", // GPIO_032 + "WIFI_SDIO_D1", // GPIO_033 + "WIFI_SDIO_D2", // GPIO_034 + "WIFI_SDIO_D3"; // GPIO_035 +}; + +&gio_aon { + gpio-line-names = + "RP1_SDA", // AON_GPIO_00 + "RP1_SCL", // AON_GPIO_01 + "RP1_RUN", // AON_GPIO_02 + "SD_IOVDD_SEL", // AON_GPIO_03 + "SD_PWR_ON", // AON_GPIO_04 + "SD_CDET_N", // AON_GPIO_05 + "SD_FLG_N", // AON_GPIO_06 + "-", // AON_GPIO_07 + "2712_WAKE", // AON_GPIO_08 + "2712_STAT_LED", // AON_GPIO_09 + "-", // AON_GPIO_10 + "-", // AON_GPIO_11 + "PMIC_INT", // AON_GPIO_12 + "UART_TX_FS", // AON_GPIO_13 + "UART_RX_FS", // AON_GPIO_14 + "-", // AON_GPIO_15 + "-", // AON_GPIO_16 + + // Pad bank0 out to 32 entries + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + + "HDMI0_SCL", // AON_SGPIO_00 + "HDMI0_SDA", // AON_SGPIO_01 + "HDMI1_SCL", // AON_SGPIO_02 + "HDMI1_SDA", // AON_SGPIO_03 + "PMIC_SCL", // AON_SGPIO_04 + "PMIC_SDA"; // AON_SGPIO_05 + + rp1_run_hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RP1 RUN pin"; + }; +}; + +&rp1_gpio { + gpio-line-names = + "ID_SDA", // GPIO0 + "ID_SCL", // GPIO1 + "GPIO2", // GPIO2 + "GPIO3", // GPIO3 + "GPIO4", // GPIO4 + "GPIO5", // GPIO5 + "GPIO6", // GPIO6 + "GPIO7", // GPIO7 + "GPIO8", // GPIO8 + "GPIO9", // GPIO9 + "GPIO10", // GPIO10 + "GPIO11", // GPIO11 + "GPIO12", // GPIO12 + "GPIO13", // GPIO13 + "GPIO14", // GPIO14 + "GPIO15", // GPIO15 + "GPIO16", // GPIO16 + "GPIO17", // GPIO17 + "GPIO18", // GPIO18 + "GPIO19", // GPIO19 + "GPIO20", // GPIO20 + "GPIO21", // GPIO21 + "GPIO22", // GPIO22 + "GPIO23", // GPIO23 + "GPIO24", // GPIO24 + "GPIO25", // GPIO25 + "GPIO26", // GPIO26 + "GPIO27", // GPIO27 + + "PCIE_RP1_WAKE", // GPIO28 + "FAN_TACH", // GPIO29 + "HOST_SDA", // GPIO30 + "HOST_SCL", // GPIO31 + "ETH_RST_N", // GPIO32 + "-", // GPIO33 + + "CD0_IO0_MICCLK", // GPIO34 + "CD0_IO0_MICDAT0", // GPIO35 + "RP1_PCIE_CLKREQ_N", // GPIO36 + "-", // GPIO37 + "CD0_SDA", // GPIO38 + "CD0_SCL", // GPIO39 + "CD1_SDA", // GPIO40 + "CD1_SCL", // GPIO41 + "USB_VBUS_EN", // GPIO42 + "USB_OC_N", // GPIO43 + "RP1_STAT_LED", // GPIO44 + "FAN_PWM", // GPIO45 + "CD1_IO0_MICCLK", // GPIO46 + "2712_WAKE", // GPIO47 + "CD1_IO1_MICDAT1", // GPIO48 + "EN_MAX_USB_CUR", // GPIO49 + "-", // GPIO50 + "-", // GPIO51 + "-", // GPIO52 + "-"; // GPIO53 + + usb_vbus_pins: usb_vbus_pins { + function = "vbus1"; + pins = "gpio42", "gpio43"; + }; +}; + +/ { + aliases: aliases { + blconfig = &blconfig; + blpubkey = &blpubkey; + bluetooth = &bluetooth; + console = &uart10; + ethernet0 = &rp1_eth; + wifi0 = &wifi; + fb = &fb; + mailbox = &mailbox; + mmc0 = &sdio1; + uart0 = &uart0; + uart1 = &uart1; + uart2 = &uart2; + uart3 = &uart3; + uart4 = &uart4; + uart10 = &uart10; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial10 = &uart10; + i2c = &i2c_arm; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c10 = &i2c_rp1boot; + // Bit-bashed i2c_gpios start at 10 + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi10 = &spi10; + gpio0 = &gpio; + gpio1 = &gio; + gpio2 = &gio_aon; + gpio3 = &pinctrl; + gpio4 = &pinctrl_aon; + usb0 = &rp1_usb0; + usb1 = &rp1_usb1; + drm-dsi1 = &dsi0; + drm-dsi2 = &dsi1; + }; + + __overrides__ { + bdaddr = <&bluetooth>, "local-bd-address["; + button_debounce = <&pwr_key>, "debounce-interval:0"; + cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status"; + uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0; + i2c0 = <&i2c0>, "status"; + i2c1 = <&i2c1>, "status"; + i2c = <&i2c1>, "status"; + i2c_arm = <&i2c_arm>, "status"; + i2c_vc = <&i2c_vc>, "status"; + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status"; + i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status"; + i2c0_baudrate = <&i2c0>, "clock-frequency:0"; + i2c1_baudrate = <&i2c1>, "clock-frequency:0"; + i2c_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0"; + krnbt = <&bluetooth>, "status"; + nvme = <&pciex1>, "status"; + pciex1 = <&pciex1>, "status"; + pciex1_gen = <&pciex1> , "max-link-speed:0"; + pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; + pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + random = <&random>, "status"; + rtc = <&rpi_rtc>, "status"; + rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0"; + sd_cqe = <&sdio1>, "supports-cqe?"; + spi = <&spi0>, "status"; + suspend = <&pwr_key>, "linux,code:0=205"; + uart0 = <&uart0>, "status"; + wifiaddr = <&wifi>, "local-mac-address["; + + act_led_gpio = <&led_act>,"gpios:4",<&led_act>,"gpios:0=",<&gpio>; + act_led_activelow = <&led_act>,"gpios:8"; + act_led_trigger = <&led_act>, "linux,default-trigger"; + pwr_led_gpio = <&led_pwr>,"gpios:4"; + pwr_led_activelow = <&led_pwr>, "gpios:8"; + pwr_led_trigger = <&led_pwr>, "linux,default-trigger"; + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0; + drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1; + drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi; + drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; + drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0; + drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1; + drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi; + drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; + drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0; + drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1; + drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi; + drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; + + fan_temp0 = <&cpu_tepid>,"temperature:0"; + fan_temp1 = <&cpu_warm>,"temperature:0"; + fan_temp2 = <&cpu_hot>,"temperature:0"; + fan_temp3 = <&cpu_vhot>,"temperature:0"; + fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0"; + fan_temp1_hyst = <&cpu_warm>,"hysteresis:0"; + fan_temp2_hyst = <&cpu_hot>,"hysteresis:0"; + fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0"; + fan_temp0_speed = <&fan>, "cooling-levels:4"; + fan_temp1_speed = <&fan>, "cooling-levels:8"; + fan_temp2_speed = <&fan>, "cooling-levels:12"; + fan_temp3_speed = <&fan>, "cooling-levels:16"; + }; +}; --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm4io.dts @@ -1,2 +1,20 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/broadcom/bcm2712-rpi-cm5-cm4io.dts" +/dts-v1/; + +#include "bcm2712-rpi-cm5.dtsi" + +// The RP1 USB3 interfaces are not usable on CM4IO + +&rp1_usb0 { + status = "disabled"; +}; + +&rp1_usb1 { + status = "disabled"; +}; + +/ { + __overrides__ { + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + }; +}; --- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5-cm5io.dts @@ -1,2 +1,10 @@ // SPDX-License-Identifier: GPL-2.0 -#include "arm/broadcom/bcm2712-rpi-cm5-cm5io.dts" +/dts-v1/; + +#include "bcm2712-rpi-cm5.dtsi" + +/ { + __overrides__ { + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + }; +}; --- a/arch/arm/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi +++ /dev/null @@ -1,890 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -#include -#include -#include -#include -#include -#include - -#define i2c0 _i2c0 -#define i2c3 _i2c3 -#define i2c4 _i2c4 -#define i2c5 _i2c5 -#define i2c6 _i2c6 -#define i2c8 _i2c8 -#define i2s _i2s -#define pwm0 _pwm0 -#define pwm1 _pwm1 -#define spi0 _spi0 -#define spi3 _spi3 -#define spi4 _spi4 -#define spi5 _spi5 -#define spi6 _spi6 -#define uart0 _uart0 -#define uart2 _uart2 -#define uart5 _uart5 - -#include "bcm2712.dtsi" - -#undef i2c0 -#undef i2c3 -#undef i2c4 -#undef i2c5 -#undef i2c6 -#undef i2c8 -#undef i2s -#undef pwm0 -#undef pwm1 -#undef spi0 -#undef spi3 -#undef spi4 -#undef spi5 -#undef spi6 -#undef uart0 -#undef uart2 -#undef uart3 -#undef uart4 -#undef uart5 - -/ { - compatible = "raspberrypi,5-compute-module", "brcm,bcm2712"; - model = "Raspberry Pi Compute Module 5"; - - /* Will be filled by the bootloader */ - memory@0 { - device_type = "memory"; - reg = <0 0 0x28000000>; - }; - - leds: leds { - compatible = "gpio-leds"; - - led_pwr: led-pwr { - label = "PWR"; - gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>; - default-state = "off"; - linux,default-trigger = "none"; - }; - - led_act: led-act { - label = "ACT"; - gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>; - default-state = "off"; - linux,default-trigger = "mmc0"; - }; - }; - - sd_io_1v8_reg: sd_io_1v8_reg { - compatible = "regulator-gpio"; - regulator-name = "vdd-sd-io"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - regulator-settling-time-us = <5000>; - gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>; - states = <1800000 0x1 - 3300000 0x0>; - status = "okay"; - }; - - sd_vcc_reg: sd_vcc_reg { - compatible = "regulator-fixed"; - regulator-name = "vcc-sd"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - enable-active-high; - gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - - wl_on_reg: wl_on_reg { - compatible = "regulator-fixed"; - regulator-name = "wl-on-regulator"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-0 = <&wl_on_pins>; - pinctrl-names = "default"; - - gpio = <&gio 28 GPIO_ACTIVE_HIGH>; - - startup-delay-us = <150000>; - enable-active-high; - }; - - clocks: clocks { - }; - - cam1_clk: cam1_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - status = "disabled"; - }; - - cam0_clk: cam0_clk { - compatible = "fixed-clock"; - #clock-cells = <0>; - status = "disabled"; - }; - - cam0_reg: cam0_reg { - compatible = "regulator-fixed"; - regulator-name = "cam0_reg"; - enable-active-high; - status = "okay"; - gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to CAM_GPIO on connector - }; - - cam_dummy_reg: cam_dummy_reg { - compatible = "regulator-fixed"; - regulator-name = "cam-dummy-reg"; - status = "okay"; - }; - - dummy: dummy { - // A target for unwanted overlay fragments - }; - - - // A few extra labels to keep overlays happy - - i2c0if: i2c0if {}; - i2c0mux: i2c0mux {}; -}; - -rp1_target: &pcie2 { - brcm,enable-mps-rcb; - brcm,vdm-qos-map = <0xbbaa9888>; - aspm-no-l0s; - status = "okay"; -}; - -// Add some labels to 2712 device - -// The system UART -uart10: &_uart0 { status = "okay"; }; - -// The system SPI for the bootloader EEPROM -spi10: &_spi0 { status = "okay"; }; - -i2c_rp1boot: &_i2c3 { }; - -#include "rp1.dtsi" - -&rp1 { - // PCIe address space layout: - // 00_00000000-00_00xxxxxx = RP1 peripherals - // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM - - // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx - // This is the RP1 peripheral space - ranges = <0xc0 0x40000000 - 0x02000000 0x00 0x00000000 - 0x00 0x00400000>; - - dma-ranges = - // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx - <0x10 0x00000000 - 0x43000000 0x10 0x00000000 - 0x10 0x00000000>, - - // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx - // This allows the RP1 DMA controller to address RP1 hardware - <0xc0 0x40000000 - 0x02000000 0x0 0x00000000 - 0x0 0x00400000>, - - // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx - <0x00 0x00000000 - 0x02000000 0x10 0x00000000 - 0x10 0x00000000>; -}; - -// Expose RP1 nodes as system nodes with labels - -&rp1_dma { - status = "okay"; -}; - -&rp1_eth { - status = "okay"; - phy-handle = <&phy1>; - phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; - phy-reset-duration = <5>; - - phy1: ethernet-phy@1 { - reg = <0x1>; - brcm,powerdown-enable; - interrupt-parent = <&gpio>; - interrupts = <37 IRQ_TYPE_LEVEL_LOW>; - }; -}; - -gpio: &rp1_gpio { - status = "okay"; -}; - -aux: &dummy {}; - -&rp1_usb0 { - pinctrl-0 = <&usb_vbus_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&rp1_usb1 { - status = "okay"; -}; - -#include "bcm2712-rpi.dtsi" - -i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only - pinctrl-0 = <&rp1_i2c6_38_39>; - pinctrl-names = "default"; - clock-frequency = <100000>; -}; - -i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector -}; - -i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility - -cam1_reg: &cam0_reg { // Shares CAM_GPIO with cam0_reg -}; - -csi0: &rp1_csi0 { }; -csi1: &rp1_csi1 { }; -dsi0: &rp1_dsi0 { }; -dsi1: &rp1_dsi1 { }; -dpi: &rp1_dpi { }; -vec: &rp1_vec { }; -dpi_gpio0: &rp1_dpi_24bit_gpio0 { }; -dpi_gpio1: &rp1_dpi_24bit_gpio2 { }; -dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { }; -dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { }; -dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { }; -dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { }; -dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { }; -dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { }; -dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { }; -dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; - -/* Add the IOMMUs for some RP1 bus masters */ - -&csi0 { - iommus = <&iommu5>; -}; - -&csi1 { - iommus = <&iommu5>; -}; - -&dsi0 { - iommus = <&iommu5>; -}; - -&dsi1 { - iommus = <&iommu5>; -}; - -&dpi { - iommus = <&iommu5>; -}; - -&vec { - iommus = <&iommu5>; -}; - -&ddc0 { - status = "disabled"; -}; - -&ddc1 { - status = "disabled"; -}; - -&hdmi0 { - clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; - clock-names = "hdmi", "bvb", "audio", "cec"; - status = "disabled"; -}; - -&hdmi1 { - clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; - clock-names = "hdmi", "bvb", "audio", "cec"; - status = "disabled"; -}; - -&hvs { - clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; - clock-names = "core", "disp"; -}; - -&mop { - status = "disabled"; -}; - -&moplet { - status = "disabled"; -}; - -&pixelvalve0 { - status = "disabled"; -}; - -&pixelvalve1 { - status = "disabled"; -}; - -&disp_intr { - status = "disabled"; -}; - -/* SDIO1 is used to drive the eMMC/SD card */ -&sdio1 { - pinctrl-0 = <&emmc_cmddat_pulls>, <&emmc_ds_pull>; - pinctrl-names = "default"; - vqmmc-supply = <&sd_io_1v8_reg>; - vmmc-supply = <&sd_vcc_reg>; - bus-width = <8>; - sd-uhs-sdr50; - sd-uhs-ddr50; - sd-uhs-sdr104; - mmc-hs200-1_8v; - mmc-hs400-1_8v; - mmc-hs400-enhanced-strobe; - broken-cd; - supports-cqe; - status = "okay"; -}; - -&pinctrl_aon { - ant_pins: ant_pins { - function = "gpio"; - pins = "aon_gpio5", "aon_gpio6"; - }; - - /* Slight hack - only one PWM pin (status LED) is usable */ - aon_pwm_1pin: aon_pwm_1pin { - function = "aon_pwm"; - pins = "aon_gpio9"; - }; -}; - -&pinctrl { - pwr_button_pins: pwr_button_pins { - function = "gpio"; - pins = "gpio20"; - bias-pull-up; - }; - - wl_on_pins: wl_on_pins { - function = "gpio"; - pins = "gpio28"; - }; - - bt_shutdown_pins: bt_shutdown_pins { - function = "gpio"; - pins = "gpio29"; - }; - - emmc_ds_pull: emmc_ds_pull { - pins = "emmc_ds"; - bias-pull-down; - }; - - emmc_cmddat_pulls: emmc_cmddat_pulls { - pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3", - "emmc_dat4", "emmc_dat5", "emmc_dat6", "emmc_dat7"; - bias-pull-up; - }; -}; - -/* uarta communicates with the BT module */ -&uarta { - uart-has-rtscts; - auto-flow-control; - status = "okay"; - clock-frequency = <96000000>; - pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>; - pinctrl-names = "default"; - - bluetooth: bluetooth { - compatible = "brcm,bcm43438-bt"; - max-speed = <3000000>; - shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; - local-bd-address = [ 00 00 00 00 00 00 ]; - }; -}; - -&i2c_rp1boot { - clock-frequency = <400000>; - pinctrl-0 = <&i2c3_m4_agpio0_pins>; - pinctrl-names = "default"; -}; - -/ { - chosen: chosen { - bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe"; - stdout-path = "serial10:115200n8"; - }; - - fan: cooling_fan { - status = "disabled"; - compatible = "pwm-fan"; - #cooling-cells = <2>; - cooling-min-state = <0>; - cooling-max-state = <3>; - cooling-levels = <0 75 125 175 250>; - pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>; - rpm-regmap = <&rp1_pwm1>; - rpm-offset = <0x3c>; - }; - - pwr_button { - compatible = "gpio-keys"; - - pinctrl-names = "default"; - pinctrl-0 = <&pwr_button_pins>; - status = "okay"; - - pwr_key: pwr { - label = "pwr_button"; - // linux,code = <205>; // KEY_SUSPEND - linux,code = <116>; // KEY_POWER - gpios = <&gio 20 GPIO_ACTIVE_LOW>; - debounce-interval = <50>; // ms - }; - }; -}; - -&usb { - power-domains = <&power RPI_POWER_DOMAIN_USB>; -}; - -/* SDIO2 drives the WLAN interface */ -&sdio2 { - pinctrl-0 = <&sdio2_30_pins>, <&ant_pins>; - pinctrl-names = "default"; - bus-width = <4>; - vmmc-supply = <&wl_on_reg>; - sd-uhs-ddr50; - non-removable; - status = "okay"; - #address-cells = <1>; - #size-cells = <0>; - - wifi: wifi@1 { - reg = <1>; - compatible = "brcm,bcm4329-fmac"; - local-mac-address = [00 00 00 00 00 00]; - }; -}; - -&rpivid { - status = "okay"; -}; - -&pinctrl { - spi10_gpio2: spi10_gpio2 { - function = "vc_spi0"; - pins = "gpio2", "gpio3", "gpio4"; - bias-disable; - }; - - spi10_cs_gpio1: spi10_cs_gpio1 { - function = "gpio"; - pins = "gpio1"; - bias-pull-up; - }; -}; - -spi10_pins: &spi10_gpio2 {}; -spi10_cs_pins: &spi10_cs_gpio1 {}; - -&spi10 { - pinctrl-names = "default"; - cs-gpios = <&gio 1 1>; - pinctrl-0 = <&spi10_pins &spi10_cs_pins>; - - spidev10: spidev@0 { - compatible = "spidev"; - reg = <0>; /* CE0 */ - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <20000000>; - status = "okay"; - }; -}; - -// ============================================= -// Board specific stuff here - -&gio_aon { - // Don't use GIO_AON as an interrupt controller because it will - // clash with the firmware monitoring the PMIC interrupt via the VPU. - - /delete-property/ interrupt-controller; -}; - -&main_aon_irq { - // Don't use the MAIN_AON_IRQ interrupt controller because it will - // clash with the firmware monitoring the PMIC interrupt via the VPU. - - status = "disabled"; -}; - -&rp1_pwm1 { - status = "disabled"; - pinctrl-0 = <&rp1_pwm1_gpio45>; - pinctrl-names = "default"; -}; - -&thermal_trips { - cpu_tepid: cpu-tepid { - temperature = <50000>; - hysteresis = <5000>; - type = "active"; - }; - - cpu_warm: cpu-warm { - temperature = <60000>; - hysteresis = <5000>; - type = "active"; - }; - - cpu_hot: cpu-hot { - temperature = <67500>; - hysteresis = <5000>; - type = "active"; - }; - - cpu_vhot: cpu-vhot { - temperature = <75000>; - hysteresis = <5000>; - type = "active"; - }; -}; - -&cooling_maps { - tepid { - trip = <&cpu_tepid>; - cooling-device = <&fan 1 1>; - }; - - warm { - trip = <&cpu_warm>; - cooling-device = <&fan 2 2>; - }; - - hot { - trip = <&cpu_hot>; - cooling-device = <&fan 3 3>; - }; - - vhot { - trip = <&cpu_vhot>; - cooling-device = <&fan 4 4>; - }; - - melt { - trip = <&cpu_crit>; - cooling-device = <&fan 4 4>; - }; -}; - -&gio { - // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank - // to reduce the clutter in gpioinfo/pinctrl - brcm,gpio-bank-widths = <32 4>; - - gpio-line-names = - "-", // GPIO_000 - "2712_BOOT_CS_N", // GPIO_001 - "2712_BOOT_MISO", // GPIO_002 - "2712_BOOT_MOSI", // GPIO_003 - "2712_BOOT_SCLK", // GPIO_004 - "-", // GPIO_005 - "-", // GPIO_006 - "-", // GPIO_007 - "-", // GPIO_008 - "-", // GPIO_009 - "-", // GPIO_010 - "-", // GPIO_011 - "-", // GPIO_012 - "-", // GPIO_013 - "-", // GPIO_014 - "-", // GPIO_015 - "-", // GPIO_016 - "-", // GPIO_017 - "-", // GPIO_018 - "-", // GPIO_019 - "PWR_GPIO", // GPIO_020 - "2712_G21_FS", // GPIO_021 - "-", // GPIO_022 - "-", // GPIO_023 - "BT_RTS", // GPIO_024 - "BT_CTS", // GPIO_025 - "BT_TXD", // GPIO_026 - "BT_RXD", // GPIO_027 - "WL_ON", // GPIO_028 - "BT_ON", // GPIO_029 - "WIFI_SDIO_CLK", // GPIO_030 - "WIFI_SDIO_CMD", // GPIO_031 - "WIFI_SDIO_D0", // GPIO_032 - "WIFI_SDIO_D1", // GPIO_033 - "WIFI_SDIO_D2", // GPIO_034 - "WIFI_SDIO_D3"; // GPIO_035 -}; - -&gio_aon { - gpio-line-names = - "RP1_SDA", // AON_GPIO_00 - "RP1_SCL", // AON_GPIO_01 - "RP1_RUN", // AON_GPIO_02 - "SD_IOVDD_SEL", // AON_GPIO_03 - "SD_PWR_ON", // AON_GPIO_04 - "ANT1", // AON_GPIO_05 - "ANT2", // AON_GPIO_06 - "-", // AON_GPIO_07 - "2712_WAKE", // AON_GPIO_08 - "2712_STAT_LED", // AON_GPIO_09 - "-", // AON_GPIO_10 - "-", // AON_GPIO_11 - "PMIC_INT", // AON_GPIO_12 - "UART_TX_FS", // AON_GPIO_13 - "UART_RX_FS", // AON_GPIO_14 - "-", // AON_GPIO_15 - "-", // AON_GPIO_16 - - // Pad bank0 out to 32 entries - "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", - - "HDMI0_SCL", // AON_SGPIO_00 - "HDMI0_SDA", // AON_SGPIO_01 - "HDMI1_SCL", // AON_SGPIO_02 - "HDMI1_SDA", // AON_SGPIO_03 - "PMIC_SCL", // AON_SGPIO_04 - "PMIC_SDA"; // AON_SGPIO_05 - - rp1_run_hog { - gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "RP1 RUN pin"; - }; - - ant1: ant1-hog { - gpio-hog; - gpios = <5 GPIO_ACTIVE_HIGH>; - /* internal antenna enabled */ - output-high; - line-name = "ant1"; - }; - - ant2: ant2-hog { - gpio-hog; - gpios = <6 GPIO_ACTIVE_HIGH>; - /* external antenna disabled */ - output-low; - line-name = "ant2"; - }; -}; - -&rp1_gpio { - gpio-line-names = - "ID_SDA", // GPIO0 - "ID_SCL", // GPIO1 - "GPIO2", // GPIO2 - "GPIO3", // GPIO3 - "GPIO4", // GPIO4 - "GPIO5", // GPIO5 - "GPIO6", // GPIO6 - "GPIO7", // GPIO7 - "GPIO8", // GPIO8 - "GPIO9", // GPIO9 - "GPIO10", // GPIO10 - "GPIO11", // GPIO11 - "GPIO12", // GPIO12 - "GPIO13", // GPIO13 - "GPIO14", // GPIO14 - "GPIO15", // GPIO15 - "GPIO16", // GPIO16 - "GPIO17", // GPIO17 - "GPIO18", // GPIO18 - "GPIO19", // GPIO19 - "GPIO20", // GPIO20 - "GPIO21", // GPIO21 - "GPIO22", // GPIO22 - "GPIO23", // GPIO23 - "GPIO24", // GPIO24 - "GPIO25", // GPIO25 - "GPIO26", // GPIO26 - "GPIO27", // GPIO27 - - "PCIE_PWR_EN", // GPIO28 - "FAN_TACH", // GPIO29 - "HOST_SDA", // GPIO30 - "HOST_SCL", // GPIO31 - "ETH_RST_N", // GPIO32 - "PCIE_DET_WAKE", // GPIO33 - - "CD0_IO0_MICCLK", // GPIO34 - "CD0_IO0_MICDAT0", // GPIO35 - "RP1_PCIE_CLKREQ_N", // GPIO36 - "ETH_IRQ_N", // GPIO37 - "SDA0", // GPIO38 - "SCL0", // GPIO39 - "-", // GPIO40 - "-", // GPIO41 - "USB_VBUS_EN", // GPIO42 - "USB_OC_N", // GPIO43 - "RP1_STAT_LED", // GPIO44 - "FAN_PWM", // GPIO45 - "-", // GPIO46 - "2712_WAKE", // GPIO47 - "-", // GPIO48 - "-", // GPIO49 - "-", // GPIO50 - "-", // GPIO51 - "-", // GPIO52 - "-"; // GPIO53 - - usb_vbus_pins: usb_vbus_pins { - function = "vbus1"; - pins = "gpio42", "gpio43"; - }; -}; - -/ { - aliases: aliases { - blconfig = &blconfig; - blpubkey = &blpubkey; - bluetooth = &bluetooth; - console = &uart10; - ethernet0 = &rp1_eth; - wifi0 = &wifi; - fb = &fb; - mailbox = &mailbox; - mmc0 = &sdio1; - uart0 = &uart0; - uart1 = &uart1; - uart2 = &uart2; - uart3 = &uart3; - uart4 = &uart4; - uart10 = &uart10; - serial0 = &uart0; - serial1 = &uart1; - serial2 = &uart2; - serial3 = &uart3; - serial4 = &uart4; - serial10 = &uart10; - i2c = &i2c_arm; - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c10 = &i2c_rp1boot; - // Bit-bashed i2c_gpios start at 10 - spi0 = &spi0; - spi1 = &spi1; - spi2 = &spi2; - spi3 = &spi3; - spi4 = &spi4; - spi5 = &spi5; - spi10 = &spi10; - gpio0 = &gpio; - gpio1 = &gio; - gpio2 = &gio_aon; - gpio3 = &pinctrl; - gpio4 = &pinctrl_aon; - usb0 = &rp1_usb0; - usb1 = &rp1_usb1; - drm-dsi1 = &dsi0; - drm-dsi2 = &dsi1; - }; - - __overrides__ { - bdaddr = <&bluetooth>, "local-bd-address["; - button_debounce = <&pwr_key>, "debounce-interval:0"; - cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status"; - uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0; - i2c0 = <&i2c0>, "status"; - i2c1 = <&i2c1>, "status"; - i2c = <&i2c1>, "status"; - i2c_arm = <&i2c_arm>, "status"; - i2c_vc = <&i2c_vc>, "status"; - i2c_csi_dsi = <&i2c_csi_dsi>, "status"; - i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status"; - i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status"; - i2c0_baudrate = <&i2c0>, "clock-frequency:0"; - i2c1_baudrate = <&i2c1>, "clock-frequency:0"; - i2c_baudrate = <&i2c_arm>, "clock-frequency:0"; - i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0"; - i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0"; - krnbt = <&bluetooth>, "status"; - nvme = <&pciex1>, "status"; - pciex1 = <&pciex1>, "status"; - pciex1_gen = <&pciex1> , "max-link-speed:0"; - pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; - pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; - pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; - random = <&random>, "status"; - rtc = <&rpi_rtc>, "status"; - rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0"; - spi = <&spi0>, "status"; - suspend = <&pwr_key>, "linux,code:0=205"; - uart0 = <&uart0>, "status"; - wifiaddr = <&wifi>, "local-mac-address["; - - act_led_activelow = <&led_act>, "active-low?"; - act_led_trigger = <&led_act>, "linux,default-trigger"; - pwr_led_activelow = <&led_pwr>, "gpios:8"; - pwr_led_trigger = <&led_pwr>, "linux,default-trigger"; - eth_led0 = <&phy1>,"led-modes:0"; - eth_led1 = <&phy1>,"led-modes:4"; - drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0; - drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1; - drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi; - drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; - drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0; - drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1; - drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi; - drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; - drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0; - drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1; - drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi; - drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; - - ant1 = <&ant1>,"output-high?=on", - <&ant1>, "output-low?=off", - <&ant2>, "output-high?=off", - <&ant2>, "output-low?=on"; - ant2 = <&ant1>,"output-high?=off", - <&ant1>, "output-low?=on", - <&ant2>, "output-high?=on", - <&ant2>, "output-low?=off"; - noant = <&ant1>,"output-high?=off", - <&ant1>, "output-low?=on", - <&ant2>, "output-high?=off", - <&ant2>, "output-low?=on"; - - fan_temp0 = <&cpu_tepid>,"temperature:0"; - fan_temp1 = <&cpu_warm>,"temperature:0"; - fan_temp2 = <&cpu_hot>,"temperature:0"; - fan_temp3 = <&cpu_vhot>,"temperature:0"; - fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0"; - fan_temp1_hyst = <&cpu_warm>,"hysteresis:0"; - fan_temp2_hyst = <&cpu_hot>,"hysteresis:0"; - fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0"; - fan_temp0_speed = <&fan>, "cooling-levels:4"; - fan_temp1_speed = <&fan>, "cooling-levels:8"; - fan_temp2_speed = <&fan>, "cooling-levels:12"; - fan_temp3_speed = <&fan>, "cooling-levels:16"; - }; -}; --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-cm5.dtsi @@ -0,0 +1,884 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include +#include +#include +#include +#include +#include + +#define i2c0 _i2c0 +#define i2c3 _i2c3 +#define i2c4 _i2c4 +#define i2c5 _i2c5 +#define i2c6 _i2c6 +#define i2c8 _i2c8 +#define i2s _i2s +#define pwm0 _pwm0 +#define pwm1 _pwm1 +#define spi0 _spi0 +#define spi3 _spi3 +#define spi4 _spi4 +#define spi5 _spi5 +#define spi6 _spi6 +#define uart0 _uart0 +#define uart2 _uart2 +#define uart5 _uart5 + +#include "bcm2712.dtsi" + +#undef i2c0 +#undef i2c3 +#undef i2c4 +#undef i2c5 +#undef i2c6 +#undef i2c8 +#undef i2s +#undef pwm0 +#undef pwm1 +#undef spi0 +#undef spi3 +#undef spi4 +#undef spi5 +#undef spi6 +#undef uart0 +#undef uart2 +#undef uart3 +#undef uart4 +#undef uart5 + +/ { + compatible = "raspberrypi,5-compute-module", "brcm,bcm2712"; + model = "Raspberry Pi Compute Module 5"; + + /* Will be filled by the bootloader */ + memory@0 { + device_type = "memory"; + reg = <0 0 0x28000000>; + }; + + leds: leds { + compatible = "gpio-leds"; + + led_pwr: led-pwr { + label = "PWR"; + gpios = <&rp1_gpio 44 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "none"; + }; + + led_act: led-act { + label = "ACT"; + gpios = <&gio_aon 9 GPIO_ACTIVE_LOW>; + default-state = "off"; + linux,default-trigger = "mmc0"; + }; + }; + + sd_io_1v8_reg: sd_io_1v8_reg { + compatible = "regulator-fixed"; + regulator-name = "vdd-sd-io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + sd_vcc_reg: sd_vcc_reg { + compatible = "regulator-fixed"; + regulator-name = "vcc-sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + enable-active-high; + gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wl_on_reg: wl_on_reg { + compatible = "regulator-fixed"; + regulator-name = "wl-on-regulator"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + pinctrl-0 = <&wl_on_pins>; + pinctrl-names = "default"; + + gpio = <&gio 28 GPIO_ACTIVE_HIGH>; + + startup-delay-us = <150000>; + enable-active-high; + }; + + clocks: clocks { + }; + + cam1_clk: cam1_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_clk: cam0_clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + status = "disabled"; + }; + + cam0_reg: cam0_reg { + compatible = "regulator-fixed"; + regulator-name = "cam0_reg"; + enable-active-high; + status = "okay"; + gpio = <&rp1_gpio 34 0>; // CD0_IO0_MICCLK, to CAM_GPIO on connector + }; + + cam_dummy_reg: cam_dummy_reg { + compatible = "regulator-fixed"; + regulator-name = "cam-dummy-reg"; + status = "okay"; + }; + + dummy: dummy { + // A target for unwanted overlay fragments + }; + + + // A few extra labels to keep overlays happy + + i2c0if: i2c0if {}; + i2c0mux: i2c0mux {}; +}; + +rp1_target: &pcie2 { + brcm,enable-mps-rcb; + brcm,vdm-qos-map = <0xbbaa9888>; + aspm-no-l0s; + status = "okay"; +}; + +// Add some labels to 2712 device + +// The system UART +uart10: &_uart0 { status = "okay"; }; + +// The system SPI for the bootloader EEPROM +spi10: &_spi0 { status = "okay"; }; + +i2c_rp1boot: &_i2c3 { }; + +#include "rp1.dtsi" + +&rp1 { + // PCIe address space layout: + // 00_00000000-00_00xxxxxx = RP1 peripherals + // 10_00000000-1x_xxxxxxxx = up to 64GB system RAM + + // outbound access aimed at PCIe 0_00xxxxxx -> RP1 c0_40xxxxxx + // This is the RP1 peripheral space + ranges = <0xc0 0x40000000 + 0x02000000 0x00 0x00000000 + 0x00 0x00400000>; + + dma-ranges = + // inbound RP1 1x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x10 0x00000000 + 0x43000000 0x10 0x00000000 + 0x10 0x00000000>, + + // inbound RP1 c0_40xxxxxx -> PCIe 00_00xxxxxx + // This allows the RP1 DMA controller to address RP1 hardware + <0xc0 0x40000000 + 0x02000000 0x0 0x00000000 + 0x0 0x00400000>, + + // inbound RP1 0x_xxxxxxxx -> PCIe 1x_xxxxxxxx + <0x00 0x00000000 + 0x02000000 0x10 0x00000000 + 0x10 0x00000000>; +}; + +// Expose RP1 nodes as system nodes with labels + +&rp1_dma { + status = "okay"; +}; + +&rp1_eth { + status = "okay"; + phy-handle = <&phy1>; + phy-reset-gpios = <&rp1_gpio 32 GPIO_ACTIVE_LOW>; + phy-reset-duration = <5>; + + phy1: ethernet-phy@1 { + reg = <0x1>; + brcm,powerdown-enable; + interrupt-parent = <&gpio>; + interrupts = <37 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +gpio: &rp1_gpio { + status = "okay"; +}; + +aux: &dummy {}; + +&rp1_usb0 { + pinctrl-0 = <&usb_vbus_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&rp1_usb1 { + status = "okay"; +}; + +#include "bcm2712-rpi.dtsi" + +i2c_csi_dsi0: &i2c6 { // Note: This is for MIPI0 connector only + pinctrl-0 = <&rp1_i2c6_38_39>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c_csi_dsi1: &i2c0 { // Note: This is for MIPI1 connector +}; + +i2c_csi_dsi: &i2c_csi_dsi1 { }; // An alias for compatibility + +cam1_reg: &cam0_reg { // Shares CAM_GPIO with cam0_reg +}; + +csi0: &rp1_csi0 { }; +csi1: &rp1_csi1 { }; +dsi0: &rp1_dsi0 { }; +dsi1: &rp1_dsi1 { }; +dpi: &rp1_dpi { }; +vec: &rp1_vec { }; +dpi_gpio0: &rp1_dpi_24bit_gpio0 { }; +dpi_gpio1: &rp1_dpi_24bit_gpio2 { }; +dpi_18bit_cpadhi_gpio0: &rp1_dpi_18bit_cpadhi_gpio0 { }; +dpi_18bit_cpadhi_gpio2: &rp1_dpi_18bit_cpadhi_gpio2 { }; +dpi_18bit_gpio0: &rp1_dpi_18bit_gpio0 { }; +dpi_18bit_gpio2: &rp1_dpi_18bit_gpio2 { }; +dpi_16bit_cpadhi_gpio0: &rp1_dpi_16bit_cpadhi_gpio0 { }; +dpi_16bit_cpadhi_gpio2: &rp1_dpi_16bit_cpadhi_gpio2 { }; +dpi_16bit_gpio0: &rp1_dpi_16bit_gpio0 { }; +dpi_16bit_gpio2: &rp1_dpi_16bit_gpio2 { }; + +/* Add the IOMMUs for some RP1 bus masters */ + +&csi0 { + iommus = <&iommu5>; +}; + +&csi1 { + iommus = <&iommu5>; +}; + +&dsi0 { + iommus = <&iommu5>; +}; + +&dsi1 { + iommus = <&iommu5>; +}; + +&dpi { + iommus = <&iommu5>; +}; + +&vec { + iommus = <&iommu5>; +}; + +&ddc0 { + status = "disabled"; +}; + +&ddc1 { + status = "disabled"; +}; + +&hdmi0 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 0>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hdmi1 { + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + status = "disabled"; +}; + +&hvs { + clocks = <&firmware_clocks 4>, <&firmware_clocks 16>; + clock-names = "core", "disp"; +}; + +&mop { + status = "disabled"; +}; + +&moplet { + status = "disabled"; +}; + +&pixelvalve0 { + status = "disabled"; +}; + +&pixelvalve1 { + status = "disabled"; +}; + +&disp_intr { + status = "disabled"; +}; + +/* SDIO1 is used to drive the eMMC/SD card */ +&sdio1 { + pinctrl-0 = <&emmc_cmddat_pulls>, <&emmc_ds_pull>; + pinctrl-names = "default"; + vqmmc-supply = <&sd_io_1v8_reg>; + vmmc-supply = <&sd_vcc_reg>; + bus-width = <8>; + sd-uhs-sdr50; + sd-uhs-ddr50; + sd-uhs-sdr104; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + broken-cd; + supports-cqe; + status = "okay"; +}; + +&pinctrl_aon { + ant_pins: ant_pins { + function = "gpio"; + pins = "aon_gpio5", "aon_gpio6"; + }; + + /* Slight hack - only one PWM pin (status LED) is usable */ + aon_pwm_1pin: aon_pwm_1pin { + function = "aon_pwm"; + pins = "aon_gpio9"; + }; +}; + +&pinctrl { + pwr_button_pins: pwr_button_pins { + function = "gpio"; + pins = "gpio20"; + bias-pull-up; + }; + + wl_on_pins: wl_on_pins { + function = "gpio"; + pins = "gpio28"; + }; + + bt_shutdown_pins: bt_shutdown_pins { + function = "gpio"; + pins = "gpio29"; + }; + + emmc_ds_pull: emmc_ds_pull { + pins = "emmc_ds"; + bias-pull-down; + }; + + emmc_cmddat_pulls: emmc_cmddat_pulls { + pins = "emmc_cmd", "emmc_dat0", "emmc_dat1", "emmc_dat2", "emmc_dat3", + "emmc_dat4", "emmc_dat5", "emmc_dat6", "emmc_dat7"; + bias-pull-up; + }; +}; + +/* uarta communicates with the BT module */ +&uarta { + uart-has-rtscts; + auto-flow-control; + status = "okay"; + clock-frequency = <96000000>; + pinctrl-0 = <&uarta_24_pins &bt_shutdown_pins>; + pinctrl-names = "default"; + + bluetooth: bluetooth { + compatible = "brcm,bcm43438-bt"; + max-speed = <3000000>; + shutdown-gpios = <&gio 29 GPIO_ACTIVE_HIGH>; + local-bd-address = [ 00 00 00 00 00 00 ]; + }; +}; + +&i2c_rp1boot { + clock-frequency = <400000>; + pinctrl-0 = <&i2c3_m4_agpio0_pins>; + pinctrl-names = "default"; +}; + +/ { + chosen: chosen { + bootargs = "reboot=w coherent_pool=1M 8250.nr_uarts=1 pci=pcie_bus_safe"; + stdout-path = "serial10:115200n8"; + }; + + fan: cooling_fan { + status = "disabled"; + compatible = "pwm-fan"; + #cooling-cells = <2>; + cooling-min-state = <0>; + cooling-max-state = <3>; + cooling-levels = <0 75 125 175 250>; + pwms = <&rp1_pwm1 3 41566 PWM_POLARITY_INVERTED>; + rpm-regmap = <&rp1_pwm1>; + rpm-offset = <0x3c>; + }; + + pwr_button { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&pwr_button_pins>; + status = "okay"; + + pwr_key: pwr { + label = "pwr_button"; + // linux,code = <205>; // KEY_SUSPEND + linux,code = <116>; // KEY_POWER + gpios = <&gio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <50>; // ms + }; + }; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +/* SDIO2 drives the WLAN interface */ +&sdio2 { + pinctrl-0 = <&sdio2_30_pins>, <&ant_pins>; + pinctrl-names = "default"; + bus-width = <4>; + vmmc-supply = <&wl_on_reg>; + sd-uhs-ddr50; + non-removable; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + wifi: wifi@1 { + reg = <1>; + compatible = "brcm,bcm4329-fmac"; + local-mac-address = [00 00 00 00 00 00]; + }; +}; + +&rpivid { + status = "okay"; +}; + +&pinctrl { + spi10_gpio2: spi10_gpio2 { + function = "vc_spi0"; + pins = "gpio2", "gpio3", "gpio4"; + bias-disable; + }; + + spi10_cs_gpio1: spi10_cs_gpio1 { + function = "gpio"; + pins = "gpio1"; + bias-pull-up; + }; +}; + +spi10_pins: &spi10_gpio2 {}; +spi10_cs_pins: &spi10_cs_gpio1 {}; + +&spi10 { + pinctrl-names = "default"; + cs-gpios = <&gio 1 1>; + pinctrl-0 = <&spi10_pins &spi10_cs_pins>; + + spidev10: spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <20000000>; + status = "okay"; + }; +}; + +// ============================================= +// Board specific stuff here + +&gio_aon { + // Don't use GIO_AON as an interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + /delete-property/ interrupt-controller; +}; + +&main_aon_irq { + // Don't use the MAIN_AON_IRQ interrupt controller because it will + // clash with the firmware monitoring the PMIC interrupt via the VPU. + + status = "disabled"; +}; + +&rp1_pwm1 { + status = "disabled"; + pinctrl-0 = <&rp1_pwm1_gpio45>; + pinctrl-names = "default"; +}; + +&thermal_trips { + cpu_tepid: cpu-tepid { + temperature = <50000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_warm: cpu-warm { + temperature = <60000>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_hot: cpu-hot { + temperature = <67500>; + hysteresis = <5000>; + type = "active"; + }; + + cpu_vhot: cpu-vhot { + temperature = <75000>; + hysteresis = <5000>; + type = "active"; + }; +}; + +&cooling_maps { + tepid { + trip = <&cpu_tepid>; + cooling-device = <&fan 1 1>; + }; + + warm { + trip = <&cpu_warm>; + cooling-device = <&fan 2 2>; + }; + + hot { + trip = <&cpu_hot>; + cooling-device = <&fan 3 3>; + }; + + vhot { + trip = <&cpu_vhot>; + cooling-device = <&fan 4 4>; + }; + + melt { + trip = <&cpu_crit>; + cooling-device = <&fan 4 4>; + }; +}; + +&gio { + // The GPIOs above 35 are not used on Pi 5, so shrink the upper bank + // to reduce the clutter in gpioinfo/pinctrl + brcm,gpio-bank-widths = <32 4>; + + gpio-line-names = + "-", // GPIO_000 + "2712_BOOT_CS_N", // GPIO_001 + "2712_BOOT_MISO", // GPIO_002 + "2712_BOOT_MOSI", // GPIO_003 + "2712_BOOT_SCLK", // GPIO_004 + "-", // GPIO_005 + "-", // GPIO_006 + "-", // GPIO_007 + "-", // GPIO_008 + "-", // GPIO_009 + "-", // GPIO_010 + "-", // GPIO_011 + "-", // GPIO_012 + "-", // GPIO_013 + "-", // GPIO_014 + "-", // GPIO_015 + "-", // GPIO_016 + "-", // GPIO_017 + "-", // GPIO_018 + "-", // GPIO_019 + "PWR_GPIO", // GPIO_020 + "2712_G21_FS", // GPIO_021 + "-", // GPIO_022 + "-", // GPIO_023 + "BT_RTS", // GPIO_024 + "BT_CTS", // GPIO_025 + "BT_TXD", // GPIO_026 + "BT_RXD", // GPIO_027 + "WL_ON", // GPIO_028 + "BT_ON", // GPIO_029 + "WIFI_SDIO_CLK", // GPIO_030 + "WIFI_SDIO_CMD", // GPIO_031 + "WIFI_SDIO_D0", // GPIO_032 + "WIFI_SDIO_D1", // GPIO_033 + "WIFI_SDIO_D2", // GPIO_034 + "WIFI_SDIO_D3"; // GPIO_035 +}; + +&gio_aon { + gpio-line-names = + "RP1_SDA", // AON_GPIO_00 + "RP1_SCL", // AON_GPIO_01 + "RP1_RUN", // AON_GPIO_02 + "SD_IOVDD_SEL", // AON_GPIO_03 + "SD_PWR_ON", // AON_GPIO_04 + "ANT1", // AON_GPIO_05 + "ANT2", // AON_GPIO_06 + "-", // AON_GPIO_07 + "2712_WAKE", // AON_GPIO_08 + "2712_STAT_LED", // AON_GPIO_09 + "-", // AON_GPIO_10 + "-", // AON_GPIO_11 + "PMIC_INT", // AON_GPIO_12 + "UART_TX_FS", // AON_GPIO_13 + "UART_RX_FS", // AON_GPIO_14 + "-", // AON_GPIO_15 + "-", // AON_GPIO_16 + + // Pad bank0 out to 32 entries + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + + "HDMI0_SCL", // AON_SGPIO_00 + "HDMI0_SDA", // AON_SGPIO_01 + "HDMI1_SCL", // AON_SGPIO_02 + "HDMI1_SDA", // AON_SGPIO_03 + "PMIC_SCL", // AON_SGPIO_04 + "PMIC_SDA"; // AON_SGPIO_05 + + rp1_run_hog { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "RP1 RUN pin"; + }; + + ant1: ant1-hog { + gpio-hog; + gpios = <5 GPIO_ACTIVE_HIGH>; + /* internal antenna enabled */ + output-high; + line-name = "ant1"; + }; + + ant2: ant2-hog { + gpio-hog; + gpios = <6 GPIO_ACTIVE_HIGH>; + /* external antenna disabled */ + output-low; + line-name = "ant2"; + }; +}; + +&rp1_gpio { + gpio-line-names = + "ID_SDA", // GPIO0 + "ID_SCL", // GPIO1 + "GPIO2", // GPIO2 + "GPIO3", // GPIO3 + "GPIO4", // GPIO4 + "GPIO5", // GPIO5 + "GPIO6", // GPIO6 + "GPIO7", // GPIO7 + "GPIO8", // GPIO8 + "GPIO9", // GPIO9 + "GPIO10", // GPIO10 + "GPIO11", // GPIO11 + "GPIO12", // GPIO12 + "GPIO13", // GPIO13 + "GPIO14", // GPIO14 + "GPIO15", // GPIO15 + "GPIO16", // GPIO16 + "GPIO17", // GPIO17 + "GPIO18", // GPIO18 + "GPIO19", // GPIO19 + "GPIO20", // GPIO20 + "GPIO21", // GPIO21 + "GPIO22", // GPIO22 + "GPIO23", // GPIO23 + "GPIO24", // GPIO24 + "GPIO25", // GPIO25 + "GPIO26", // GPIO26 + "GPIO27", // GPIO27 + + "PCIE_PWR_EN", // GPIO28 + "FAN_TACH", // GPIO29 + "HOST_SDA", // GPIO30 + "HOST_SCL", // GPIO31 + "ETH_RST_N", // GPIO32 + "PCIE_DET_WAKE", // GPIO33 + + "CD0_IO0_MICCLK", // GPIO34 + "CD0_IO0_MICDAT0", // GPIO35 + "RP1_PCIE_CLKREQ_N", // GPIO36 + "ETH_IRQ_N", // GPIO37 + "SDA0", // GPIO38 + "SCL0", // GPIO39 + "-", // GPIO40 + "-", // GPIO41 + "USB_VBUS_EN", // GPIO42 + "USB_OC_N", // GPIO43 + "RP1_STAT_LED", // GPIO44 + "FAN_PWM", // GPIO45 + "-", // GPIO46 + "2712_WAKE", // GPIO47 + "-", // GPIO48 + "-", // GPIO49 + "-", // GPIO50 + "-", // GPIO51 + "-", // GPIO52 + "-"; // GPIO53 + + usb_vbus_pins: usb_vbus_pins { + function = "vbus1"; + pins = "gpio42", "gpio43"; + }; +}; + +/ { + aliases: aliases { + blconfig = &blconfig; + blpubkey = &blpubkey; + bluetooth = &bluetooth; + console = &uart10; + ethernet0 = &rp1_eth; + wifi0 = &wifi; + fb = &fb; + mailbox = &mailbox; + mmc0 = &sdio1; + uart0 = &uart0; + uart1 = &uart1; + uart2 = &uart2; + uart3 = &uart3; + uart4 = &uart4; + uart10 = &uart10; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial10 = &uart10; + i2c = &i2c_arm; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + i2c10 = &i2c_rp1boot; + // Bit-bashed i2c_gpios start at 10 + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; + spi4 = &spi4; + spi5 = &spi5; + spi10 = &spi10; + gpio0 = &gpio; + gpio1 = &gio; + gpio2 = &gio_aon; + gpio3 = &pinctrl; + gpio4 = &pinctrl_aon; + usb0 = &rp1_usb0; + usb1 = &rp1_usb1; + drm-dsi1 = &dsi0; + drm-dsi2 = &dsi1; + }; + + __overrides__ { + bdaddr = <&bluetooth>, "local-bd-address["; + button_debounce = <&pwr_key>, "debounce-interval:0"; + cooling_fan = <&fan>, "status", <&rp1_pwm1>, "status"; + uart0_console = <&uart0>,"status", <&aliases>, "console=",&uart0; + i2c0 = <&i2c0>, "status"; + i2c1 = <&i2c1>, "status"; + i2c = <&i2c1>, "status"; + i2c_arm = <&i2c_arm>, "status"; + i2c_vc = <&i2c_vc>, "status"; + i2c_csi_dsi = <&i2c_csi_dsi>, "status"; + i2c_csi_dsi0 = <&i2c_csi_dsi0>, "status"; + i2c_csi_dsi1 = <&i2c_csi_dsi1>, "status"; + i2c0_baudrate = <&i2c0>, "clock-frequency:0"; + i2c1_baudrate = <&i2c1>, "clock-frequency:0"; + i2c_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_arm_baudrate = <&i2c_arm>, "clock-frequency:0"; + i2c_vc_baudrate = <&i2c_vc>, "clock-frequency:0"; + krnbt = <&bluetooth>, "status"; + nvme = <&pciex1>, "status"; + pciex1 = <&pciex1>, "status"; + pciex1_gen = <&pciex1> , "max-link-speed:0"; + pciex1_no_l0s = <&pciex1>, "aspm-no-l0s?"; + pciex1_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + pcie_tperst_clk_ms = <&pciex1>, "brcm,tperst-clk-ms:0"; + random = <&random>, "status"; + rtc = <&rpi_rtc>, "status"; + rtc_bbat_vchg = <&rpi_rtc>, "trickle-charge-microvolt:0"; + spi = <&spi0>, "status"; + suspend = <&pwr_key>, "linux,code:0=205"; + uart0 = <&uart0>, "status"; + wifiaddr = <&wifi>, "local-mac-address["; + + act_led_activelow = <&led_act>, "active-low?"; + act_led_trigger = <&led_act>, "linux,default-trigger"; + pwr_led_activelow = <&led_pwr>, "gpios:8"; + pwr_led_trigger = <&led_pwr>, "linux,default-trigger"; + eth_led0 = <&phy1>,"led-modes:0"; + eth_led1 = <&phy1>,"led-modes:4"; + drm_fb0_rp1_dsi0 = <&aliases>, "drm-fb0=",&dsi0; + drm_fb0_rp1_dsi1 = <&aliases>, "drm-fb0=",&dsi1; + drm_fb0_rp1_dpi = <&aliases>, "drm-fb0=",&dpi; + drm_fb0_vc4 = <&aliases>, "drm-fb0=",&vc4; + drm_fb1_rp1_dsi0 = <&aliases>, "drm-fb1=",&dsi0; + drm_fb1_rp1_dsi1 = <&aliases>, "drm-fb1=",&dsi1; + drm_fb1_rp1_dpi = <&aliases>, "drm-fb1=",&dpi; + drm_fb1_vc4 = <&aliases>, "drm-fb1=",&vc4; + drm_fb2_rp1_dsi0 = <&aliases>, "drm-fb2=",&dsi0; + drm_fb2_rp1_dsi1 = <&aliases>, "drm-fb2=",&dsi1; + drm_fb2_rp1_dpi = <&aliases>, "drm-fb2=",&dpi; + drm_fb2_vc4 = <&aliases>, "drm-fb2=",&vc4; + + ant1 = <&ant1>,"output-high?=on", + <&ant1>, "output-low?=off", + <&ant2>, "output-high?=off", + <&ant2>, "output-low?=on"; + ant2 = <&ant1>,"output-high?=off", + <&ant1>, "output-low?=on", + <&ant2>, "output-high?=on", + <&ant2>, "output-low?=off"; + noant = <&ant1>,"output-high?=off", + <&ant1>, "output-low?=on", + <&ant2>, "output-high?=off", + <&ant2>, "output-low?=on"; + + fan_temp0 = <&cpu_tepid>,"temperature:0"; + fan_temp1 = <&cpu_warm>,"temperature:0"; + fan_temp2 = <&cpu_hot>,"temperature:0"; + fan_temp3 = <&cpu_vhot>,"temperature:0"; + fan_temp0_hyst = <&cpu_tepid>,"hysteresis:0"; + fan_temp1_hyst = <&cpu_warm>,"hysteresis:0"; + fan_temp2_hyst = <&cpu_hot>,"hysteresis:0"; + fan_temp3_hyst = <&cpu_vhot>,"hysteresis:0"; + fan_temp0_speed = <&fan>, "cooling-levels:4"; + fan_temp1_speed = <&fan>, "cooling-levels:8"; + fan_temp2_speed = <&fan>, "cooling-levels:12"; + fan_temp3_speed = <&fan>, "cooling-levels:16"; + }; +}; --- a/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts +++ b/arch/arm64/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts @@ -1,2 +1,107 @@ // SPDX-License-Identifier: GPL-2.0 -#include "../../../../arm/boot/dts/broadcom/bcm2712d0-rpi-5-b.dts" +#include "bcm2712-rpi-5-b.dts" + +&gio { + brcm,gpio-bank-widths = <32 4>; + + gpio-line-names = + "", // GPIO_000 + "2712_BOOT_CS_N", // GPIO_001 + "2712_BOOT_MISO", // GPIO_002 + "2712_BOOT_MOSI", // GPIO_003 + "2712_BOOT_SCLK", // GPIO_004 + "", // GPIO_005 + "", // GPIO_006 + "", // GPIO_007 + "", // GPIO_008 + "", // GPIO_009 + "", // GPIO_010 + "", // GPIO_011 + "", // GPIO_012 + "", // GPIO_013 + "PCIE_SDA", // GPIO_014 + "PCIE_SCL", // GPIO_015 + "", // GPIO_016 + "", // GPIO_017 + "-", // GPIO_018 + "-", // GPIO_019 + "PWR_GPIO", // GPIO_020 + "2712_G21_FS", // GPIO_021 + "-", // GPIO_022 + "-", // GPIO_023 + "BT_RTS", // GPIO_024 + "BT_CTS", // GPIO_025 + "BT_TXD", // GPIO_026 + "BT_RXD", // GPIO_027 + "WL_ON", // GPIO_028 + "BT_ON", // GPIO_029 + "WIFI_SDIO_CLK", // GPIO_030 + "WIFI_SDIO_CMD", // GPIO_031 + "WIFI_SDIO_D0", // GPIO_032 + "WIFI_SDIO_D1", // GPIO_033 + "WIFI_SDIO_D2", // GPIO_034 + "WIFI_SDIO_D3"; // GPIO_035 +}; + +&gio_aon { + brcm,gpio-bank-widths = <15 6>; + + gpio-line-names = + "RP1_SDA", // AON_GPIO_00 + "RP1_SCL", // AON_GPIO_01 + "RP1_RUN", // AON_GPIO_02 + "SD_IOVDD_SEL", // AON_GPIO_03 + "SD_PWR_ON", // AON_GPIO_04 + "SD_CDET_N", // AON_GPIO_05 + "SD_FLG_N", // AON_GPIO_06 + "", // AON_GPIO_07 + "2712_WAKE", // AON_GPIO_08 + "2712_STAT_LED", // AON_GPIO_09 + "", // AON_GPIO_10 + "", // AON_GPIO_11 + "PMIC_INT", // AON_GPIO_12 + "UART_TX_FS", // AON_GPIO_13 + "UART_RX_FS", // AON_GPIO_14 + "", // AON_GPIO_15 + "", // AON_GPIO_16 + + // Pad bank0 out to 32 entries + "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", + + "HDMI0_SCL", // AON_SGPIO_00 + "HDMI0_SDA", // AON_SGPIO_01 + "HDMI1_SCL", // AON_SGPIO_02 + "HDMI1_SDA", // AON_SGPIO_03 + "PMIC_SCL", // AON_SGPIO_04 + "PMIC_SDA"; // AON_SGPIO_05 +}; + +&pinctrl { + compatible = "brcm,bcm2712d0-pinctrl"; + reg = <0x7d504100 0x20>; +}; + +&pinctrl_aon { + compatible = "brcm,bcm2712d0-aon-pinctrl"; + reg = <0x7d510700 0x1c>; +}; + +&vc4 { + compatible = "brcm,bcm2712d0-vc6"; +}; + +&uart10 { + interrupts = ; +}; + +&spi10 { + dmas = <&dma40 3>, <&dma40 4>; +}; + +&hdmi0 { + dmas = <&dma40 (12|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; + +&hdmi1 { + dmas = <&dma40 (13|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; --- a/arch/arm/boot/dts/broadcom/bcm2712-rpi.dtsi +++ /dev/null @@ -1,351 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 - -#include - -&soc { - firmware: firmware { - compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - - mboxes = <&mailbox>; - dma-ranges; - - firmware_clocks: clocks { - compatible = "raspberrypi,firmware-clocks"; - #clock-cells = <1>; - }; - - reset: reset { - compatible = "raspberrypi,firmware-reset"; - #reset-cells = <1>; - }; - - vcio: vcio { - compatible = "raspberrypi,vcio"; - }; - }; - - power: power { - compatible = "raspberrypi,bcm2835-power"; - firmware = <&firmware>; - #power-domain-cells = <1>; - }; - - fb: fb { - compatible = "brcm,bcm2708-fb"; - firmware = <&firmware>; - status = "okay"; - }; - - rpi_rtc: rpi_rtc { - compatible = "raspberrypi,rpi-rtc"; - firmware = <&firmware>; - status = "okay"; - trickle-charge-microvolt = <0>; - }; - - nvmem { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - nvmem_otp: nvmem_otp { - compatible = "raspberrypi,rpi-otp"; - firmware = <&firmware>; - reg = <0 192>; - status = "okay"; - }; - - nvmem_cust: nvmem_cust { - compatible = "raspberrypi,rpi-otp"; - firmware = <&firmware>; - reg = <1 8>; - status = "okay"; - }; - - nvmem_mac: nvmem_mac { - compatible = "raspberrypi,rpi-otp"; - firmware = <&firmware>; - reg = <2 6>; - status = "okay"; - }; - - nvmem_priv: nvmem_priv { - compatible = "raspberrypi,rpi-otp"; - firmware = <&firmware>; - reg = <3 16>; - status = "okay"; - }; - }; - - /* Define these notional regulators for use by overlays, etc. */ - vdd_3v3_reg: fixedregulator_3v3 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "3v3"; - }; - - vdd_5v0_reg: fixedregulator_5v0 { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-max-microvolt = <5000000>; - regulator-min-microvolt = <5000000>; - regulator-name = "5v0"; - }; -}; - -/ { - __overrides__ { - arm_freq; - axiperf = <&axiperf>,"status"; - - nvmem_cust_rw = <&nvmem_cust>,"rw?"; - nvmem_priv_rw = <&nvmem_priv>,"rw?"; - nvmem_mac_rw = <&nvmem_mac>,"rw?"; - strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n"; - - cam0_reg = <&cam0_reg>,"status"; - cam0_reg_gpio = <&cam0_reg>,"gpio:4", - <&cam0_reg>,"gpio:0=", <&gpio>; - cam1_reg = <&cam1_reg>,"status"; - cam1_reg_gpio = <&cam1_reg>,"gpio:4", - <&cam1_reg>,"gpio:0=", <&gpio>; - - }; -}; - -pciex1: &pcie1 { }; -pciex4: &pcie2 { }; - -&dma32 { - /* The VPU firmware uses DMA channel 11 for VCHIQ */ - brcm,dma-channel-mask = <0x03f>; -}; - -&dma40 { - /* The VPU firmware DMA channel 11 for VCHIQ */ - brcm,dma-channel-mask = <0x07c0>; -}; - -&hdmi0 { - dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; -}; - -&hdmi1 { - dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; -}; - -&spi10 { - dmas = <&dma40 6>, <&dma40 7>; - dma-names = "tx", "rx"; -}; - -&usb { - power-domains = <&power RPI_POWER_DOMAIN_USB>; -}; - -&rmem { - /* - * RPi5's co-processor will copy the board's bootloader configuration - * into memory for the OS to consume. It'll also update this node with - * its placement information. - */ - blconfig: nvram@0 { - compatible = "raspberrypi,bootloader-config", "nvmem-rmem"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0 0x0 0x0>; - no-map; - status = "disabled"; - }; - /* - * RPi5 will copy the binary public key blob (if present) from the bootloader - * into memory for use by the OS. - */ - blpubkey: nvram@1 { - compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem"; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0 0x0 0x0>; - no-map; - status = "disabled"; - }; -}; - -&rp1_adc { - status = "okay"; -}; - -/* Add some gpiomem nodes to make the devices accessible to userspace. - * /dev/gpiomem should expose the registers for the interface with DT alias - * gpio. - */ - -&rp1 { - gpiomem@d0000 { - /* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */ - compatible = "raspberrypi,gpiomem"; - reg = <0xc0 0x400d0000 0x0 0x30000>; - chardev-name = "gpiomem0"; - }; -}; - -&soc { - gpiomem@7d508500 { - compatible = "raspberrypi,gpiomem"; - reg = <0x7d508500 0x40>; - chardev-name = "gpiomem1"; - }; - - gpiomem@7d517c00 { - compatible = "raspberrypi,gpiomem"; - reg = <0x7d517c00 0x40>; - chardev-name = "gpiomem2"; - }; - - gpiomem@7d504100 { - compatible = "raspberrypi,gpiomem"; - reg = <0x7d504100 0x20>; - chardev-name = "gpiomem3"; - }; - - gpiomem@7d510700 { - compatible = "raspberrypi,gpiomem"; - reg = <0x7d510700 0x20>; - chardev-name = "gpiomem4"; - }; - - sound: sound { - status = "disabled"; - }; -}; - -i2c0: &rp1_i2c0 { }; -i2c1: &rp1_i2c1 { }; -i2c2: &rp1_i2c2 { }; -i2c3: &rp1_i2c3 { }; -i2c4: &rp1_i2c4 { }; -i2c5: &rp1_i2c5 { }; -i2c6: &rp1_i2c6 { }; -i2s: &rp1_i2s0 { }; -i2s_clk_producer: &rp1_i2s0 { }; -i2s_clk_consumer: &rp1_i2s1 { }; -pwm0: &rp1_pwm0 { }; -pwm1: &rp1_pwm1 { }; -pwm: &pwm0 { }; -spi0: &rp1_spi0 { }; -spi1: &rp1_spi1 { }; -spi2: &rp1_spi2 { }; -spi3: &rp1_spi3 { }; -spi4: &rp1_spi4 { }; -spi5: &rp1_spi5 { }; - -uart0_pins: &rp1_uart0_14_15 {}; -uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {}; -uart0: &rp1_uart0 { - pinctrl-0 = <&uart0_pins>; -}; - -uart1_pins: &rp1_uart1_0_1 {}; -uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {}; -uart1: &rp1_uart1 { }; - -uart2_pins: &rp1_uart2_4_5 {}; -uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {}; -uart2: &rp1_uart2 { }; - -uart3_pins: &rp1_uart3_8_9 {}; -uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {}; -uart3: &rp1_uart3 { }; - -uart4_pins: &rp1_uart4_12_13 {}; -uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {}; -uart4: &rp1_uart4 { }; - -i2c0_pins: &rp1_i2c0_0_1 {}; -i2c_vc: &i2c0 { // This is pins 27,28 on the header (not MIPI) - pinctrl-0 = <&i2c0_pins>; - pinctrl-names = "default"; - clock-frequency = <100000>; -}; - -i2c1_pins: &rp1_i2c1_2_3 {}; -i2c_arm: &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - clock-frequency = <100000>; -}; - -i2c2_pins: &rp1_i2c2_4_5 {}; -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; -}; - -i2c3_pins: &rp1_i2c3_6_7 {}; -&i2c3 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c3_pins>; -}; - -&i2s_clk_producer { - pinctrl-names = "default"; - pinctrl-0 = <&rp1_i2s0_18_21>; -}; - -&i2s_clk_consumer { - pinctrl-names = "default"; - pinctrl-0 = <&rp1_i2s1_18_21>; -}; - -spi0_pins: &rp1_spi0_gpio9 {}; -spi0_cs_pins: &rp1_spi0_cs_gpio7 {}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spi0_pins &spi0_cs_pins>; - cs-gpios = <&gpio 8 1>, <&gpio 7 1>; - - spidev0: spidev@0 { - compatible = "spidev"; - reg = <0>; /* CE0 */ - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <125000000>; - }; - - spidev1: spidev@1 { - compatible = "spidev"; - reg = <1>; /* CE1 */ - #address-cells = <1>; - #size-cells = <0>; - spi-max-frequency = <125000000>; - }; -}; - -spi2_pins: &rp1_spi2_gpio1 {}; -&spi2 { - pinctrl-names = "default"; - pinctrl-0 = <&spi2_pins>; -}; - -spi3_pins: &rp1_spi3_gpio5 {}; -&spi3 { - pinctrl-names = "default"; - pinctrl-0 = <&spi3_pins>; -}; - -spi4_pins: &rp1_spi4_gpio9 {}; -&spi4 { - pinctrl-names = "default"; - pinctrl-0 = <&spi4_pins>; -}; - -spi5_pins: &rp1_spi5_gpio13 {}; -&spi5 { - pinctrl-names = "default"; - pinctrl-0 = <&spi5_pins>; -}; --- a/arch/arm/boot/dts/broadcom/bcm2712.dtsi +++ /dev/null @@ -1,1302 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include -#include -#include - -/ { - compatible = "brcm,bcm2712", "brcm,bcm2711"; - model = "BCM2712"; - - #address-cells = <2>; - #size-cells = <1>; - - interrupt-parent = <&gicv2>; - - rmem: reserved-memory { - #address-cells = <2>; - #size-cells = <1>; - ranges; - - atf@0 { - reg = <0x0 0x0 0x80000>; - no-map; - }; - - cma: linux,cma { - compatible = "shared-dma-pool"; - size = <0x4000000>; /* 64MB */ - reusable; - linux,cma-default; - - /* - * arm64 reserves the CMA by default somewhere in - * ZONE_DMA32, that's not good enough for the BCM2711 - * as some devices can only address the lower 1G of - * memory (ZONE_DMA). - */ - alloc-ranges = <0x0 0x00000000 0x40000000>; - }; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <2000>; - polling-delay = <1000>; - coefficients = <(-550) 450000>; - thermal-sensors = <&thermal>; - - thermal_trips: trips { - cpu_crit: cpu-crit { - temperature = <110000>; - hysteresis = <0>; - type = "critical"; - }; - }; - - cooling_maps: cooling-maps { - }; - }; - }; - - clk_27MHz: clk-27M { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <27000000>; - clock-output-names = "27MHz-clock"; - }; - - clk_108MHz: clk-108M { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <108000000>; - clock-output-names = "108MHz-clock"; - }; - - hvs: hvs@107c580000 { - compatible = "brcm,bcm2712-hvs"; - reg = <0x10 0x7c580000 0x1a000>; - interrupt-parent = <&disp_intr>; - interrupts = <2>, <9>, <16>; - interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof"; - //iommus = <&iommu4>; - status = "disabled"; - }; - - soc: soc { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <1>; - - ranges = <0x7c000000 0x10 0x7c000000 0x04000000>; - /* Emulate a contiguous 30-bit address range for DMA */ - dma-ranges = <0xc0000000 0x00 0x00000000 0x40000000>, - <0x7c000000 0x10 0x7c000000 0x04000000>; - - system_timer: timer@7c003000 { - compatible = "brcm,bcm2835-system-timer"; - reg = <0x7c003000 0x1000>; - interrupts = , - , - , - ; - clock-frequency = <1000000>; - }; - - firmwarekms: firmwarekms@7d503000 { - compatible = "raspberrypi,rpi-firmware-kms-2712"; - /* SUN_L2 interrupt reg */ - reg = <0x7d503000 0x18>; - interrupt-parent = <&cpu_l2_irq>; - interrupts = <19>; - brcm,firmware = <&firmware>; - status = "disabled"; - }; - - axiperf: axiperf { - compatible = "brcm,bcm2712-axiperf"; - reg = <0x7c012800 0x100>, - <0x7e000000 0x100>; - firmware = <&firmware>; - status = "disabled"; - }; - - mailbox: mailbox@7c013880 { - compatible = "brcm,bcm2835-mbox"; - reg = <0x7c013880 0x40>; - interrupts = ; - #mbox-cells = <0>; - }; - - pixelvalve0: pixelvalve@7c410000 { - compatible = "brcm,bcm2712-pixelvalve0"; - reg = <0x7c410000 0x100>; - interrupts = ; - status = "disabled"; - }; - - pixelvalve1: pixelvalve@7c411000 { - compatible = "brcm,bcm2712-pixelvalve1"; - reg = <0x7c411000 0x100>; - interrupts = ; - status = "disabled"; - }; - - mop: mop@7c500000 { - compatible = "brcm,bcm2712-mop"; - reg = <0x7c500000 0x28>; - interrupt-parent = <&disp_intr>; - interrupts = <1>; - status = "disabled"; - }; - - moplet: moplet@7c501000 { - compatible = "brcm,bcm2712-moplet"; - reg = <0x7c501000 0x20>; - interrupt-parent = <&disp_intr>; - interrupts = <0>; - status = "disabled"; - }; - - disp_intr: interrupt-controller@7c502000 { - compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; - reg = <0x7c502000 0x30>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - status = "disabled"; - }; - - dvp: clock@7c700000 { - compatible = "brcm,brcm2711-dvp"; - reg = <0x7c700000 0x10>; - clocks = <&clk_108MHz>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - - /* - * This node is the provider for the enable-method for - * bringing up secondary cores. - */ - local_intc: local_intc@7cd00000 { - compatible = "brcm,bcm2836-l1-intc"; - reg = <0x7cd00000 0x100>; - }; - - uart0: serial@7d001000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7d001000 0x200>; - interrupts = ; - clocks = <&clk_uart>, - <&clk_vpu>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x00241011>; - status = "disabled"; - }; - - uart2: serial@7d001400 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7d001400 0x200>; - interrupts = ; - clocks = <&clk_uart>, - <&clk_vpu>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x00241011>; - status = "disabled"; - }; - - uart5: serial@7d001a00 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x7d001a00 0x200>; - interrupts = ; - clocks = <&clk_uart>, - <&clk_vpu>; - clock-names = "uartclk", "apb_pclk"; - arm,primecell-periphid = <0x00241011>; - status = "disabled"; - }; - - sdhost: mmc@7d002000 { - compatible = "brcm,bcm2835-sdhost"; - reg = <0x7d002000 0x100>; - //interrupts = ; - clocks = <&clk_vpu>; - status = "disabled"; - }; - - i2s: i2s@7d003000 { - compatible = "brcm,bcm2835-i2s"; - reg = <0x7d003000 0x24>; - //clocks = <&cprman BCM2835_CLOCK_PCM>; - status = "disabled"; - }; - - spi0: spi@7d004000 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7d004000 0x200>; - interrupts = ; - clocks = <&clk_vpu>; - num-cs = <1>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi3: spi@7d004600 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7d004600 0x0200>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi4: spi@7d004800 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7d004800 0x0200>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi5: spi@7d004a00 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7d004a00 0x0200>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - spi6: spi@7d004c00 { - compatible = "brcm,bcm2835-spi"; - reg = <0x7d004c00 0x0200>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c0: i2c@7d005000 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7d005000 0x20>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c3: i2c@7d005600 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7d005600 0x20>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c4: i2c@7d005800 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7d005800 0x20>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c5: i2c@7d005a00 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7d005a00 0x20>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c6: i2c@7d005c00 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7d005c00 0x20>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - i2c8: i2c@7d005e00 { - compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; - reg = <0x7d005e00 0x20>; - interrupts = ; - clocks = <&clk_vpu>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm0: pwm@7d00c000 { - compatible = "brcm,bcm2835-pwm"; - reg = <0x7d00c000 0x28>; - assigned-clock-rates = <50000000>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pwm1: pwm@7d00c800 { - compatible = "brcm,bcm2835-pwm"; - reg = <0x7d00c800 0x28>; - assigned-clock-rates = <50000000>; - #pwm-cells = <3>; - status = "disabled"; - }; - - pm: watchdog@7d200000 { - compatible = "brcm,bcm2712-pm"; - reg = <0x7d200000 0x308>; - reg-names = "pm"; - #power-domain-cells = <1>; - #reset-cells = <1>; - //clocks = <&cprman BCM2835_CLOCK_V3D>, - // <&cprman BCM2835_CLOCK_PERI_IMAGE>, - // <&cprman BCM2835_CLOCK_H264>, - // <&cprman BCM2835_CLOCK_ISP>; - clock-names = "v3d", "peri_image", "h264", "isp"; - system-power-controller; - }; - - cprman: cprman@7d202000 { - compatible = "brcm,bcm2711-cprman"; - reg = <0x7d202000 0x2000>; - #clock-cells = <1>; - - /* CPRMAN derives almost everything from the - * platform's oscillator. However, the DSI - * pixel clocks come from the DSI analog PHY. - */ - clocks = <&clk_osc>; - status = "disabled"; - }; - - random: rng@7d208000 { - compatible = "brcm,bcm2711-rng200"; - reg = <0x7d208000 0x28>; - status = "okay"; - }; - - cpu_l2_irq: intc@7d503000 { - compatible = "brcm,l2-intc"; - reg = <0x7d503000 0x18>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - }; - - pinctrl: pinctrl@7d504100 { - compatible = "brcm,bcm2712-pinctrl"; - reg = <0x7d504100 0x30>; - - uarta_24_pins: uarta_24_pins { - pin_rts { - function = "uart0"; - pins = "gpio24"; - bias-disable; - }; - pin_cts { - function = "uart0"; - pins = "gpio25"; - bias-pull-up; - }; - pin_txd { - function = "uart0"; - pins = "gpio26"; - bias-disable; - }; - pin_rxd { - function = "uart0"; - pins = "gpio27"; - bias-pull-up; - }; - }; - - sdio2_30_pins: sdio2_30_pins { - pin_clk { - function = "sd2"; - pins = "gpio30"; - bias-disable; - }; - pin_cmd { - function = "sd2"; - pins = "gpio31"; - bias-pull-up; - }; - pins_dat { - function = "sd2"; - pins = "gpio32", "gpio33", "gpio34", "gpio35"; - bias-pull-up; - }; - }; - }; - - ddc0: i2c@7d508200 { - compatible = "brcm,brcmstb-i2c"; - reg = <0x7d508200 0x58>; - interrupt-parent = <&bsc_irq>; - interrupts = <1>; - clock-frequency = <97500>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - ddc1: i2c@7d508280 { - compatible = "brcm,brcmstb-i2c"; - reg = <0x7d508280 0x58>; - interrupt-parent = <&bsc_irq>; - interrupts = <2>; - clock-frequency = <97500>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - bscd: i2c@7d508300 { - compatible = "brcm,brcmstb-i2c"; - reg = <0x7d508300 0x58>; - interrupt-parent = <&bsc_irq>; - interrupts = <0>; - clock-frequency = <200000>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - bsc_irq: intc@7d508380 { - compatible = "brcm,bcm7271-l2-intc"; - reg = <0x7d508380 0x10>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - }; - - main_irq: intc@7d508400 { - compatible = "brcm,bcm7271-l2-intc"; - reg = <0x7d508400 0x10>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gio: gpio@7d508500 { - compatible = "brcm,brcmstb-gpio"; - reg = <0x7d508500 0x40>; - interrupt-parent = <&main_irq>; - interrupts = <0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - brcm,gpio-bank-widths = <32 22>; - brcm,gpio-direct; - }; - - uarta: serial@7d50c000 { - compatible = "brcm,bcm7271-uart"; - reg = <0x7d50c000 0x20>; - reg-names = "uart"; - reg-shift = <2>; - reg-io-width = <4>; - interrupts = ; - skip-init; - status = "disabled"; - }; - - uartb: serial@7d50d000 { - compatible = "brcm,bcm7271-uart"; - reg = <0x7d50d000 0x20>; - reg-names = "uart"; - reg-shift = <2>; - reg-io-width = <4>; - interrupts = ; - skip-init; - status = "disabled"; - }; - - aon_intr: interrupt-controller@7d510600 { - compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; - reg = <0x7d510600 0x30>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - status = "disabled"; - }; - - pinctrl_aon: pinctrl@7d510700 { - compatible = "brcm,bcm2712-aon-pinctrl"; - reg = <0x7d510700 0x20>; - - i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins { - function = "vc_i2c3"; - pins = "aon_gpio0", "aon_gpio1"; - bias-pull-up; - }; - - bsc_m1_agpio13_pins: bsc_m1_agpio13_pins { - function = "bsc_m1"; - pins = "aon_gpio13", "aon_gpio14"; - bias-pull-up; - }; - - bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins { - function = "avs_pmu_bsc"; - pins = "aon_sgpio4", "aon_sgpio5"; - }; - - bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins { - function = "bsc_m2"; - pins = "aon_sgpio4", "aon_sgpio5"; - }; - - pwm_aon_agpio1_pins: pwm_aon_agpio1_pins { - function = "aon_pwm"; - pins = "aon_gpio1", "aon_gpio2"; - }; - - pwm_aon_agpio4_pins: pwm_aon_agpio4_pins { - function = "vc_pwm0"; - pins = "aon_gpio4", "aon_gpio5"; - }; - - pwm_aon_agpio7_pins: pwm_aon_agpio7_pins { - function = "aon_pwm"; - pins = "aon_gpio7", "aon_gpio9"; - }; - }; - - intc@7d517000 { - compatible = "brcm,bcm7271-l2-intc"; - reg = <0x7d517000 0x10>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - status = "disabled"; - }; - - bscc: i2c@7d517a00 { - compatible = "brcm,brcmstb-i2c"; - reg = <0x7d517a00 0x58>; - interrupt-parent = <&bsc_aon_irq>; - interrupts = <0>; - clock-frequency = <200000>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - pwm_aon: pwm@7d517a80 { - compatible = "brcm,bcm7038-pwm"; - reg = <0x7d517a80 0x28>; - #pwm-cells = <3>; - clocks = <&clk_27MHz>; - }; - - main_aon_irq: intc@7d517ac0 { - compatible = "brcm,bcm7271-l2-intc"; - reg = <0x7d517ac0 0x10>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - }; - - bsc_aon_irq: intc@7d517b00 { - compatible = "brcm,bcm7271-l2-intc"; - reg = <0x7d517b00 0x10>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <1>; - }; - - gio_aon: gpio@7d517c00 { - compatible = "brcm,brcmstb-gpio"; - reg = <0x7d517c00 0x40>; - interrupt-parent = <&main_aon_irq>; - interrupts = <0>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - brcm,gpio-bank-widths = <17 6>; - brcm,gpio-direct; - }; - - avs_monitor: avs-monitor@7d542000 { - compatible = "brcm,bcm2711-avs-monitor", - "syscon", "simple-mfd"; - reg = <0x7d542000 0xf00>; - status = "okay"; - - thermal: thermal { - compatible = "brcm,bcm2711-thermal"; - #thermal-sensor-cells = <0>; - }; - }; - - bsc_pmu: i2c@7d544000 { - compatible = "brcm,brcmstb-i2c"; - reg = <0x7d544000 0x58>; - interrupt-parent = <&bsc_aon_irq>; - interrupts = <1>; - clock-frequency = <200000>; - status = "disabled"; - }; - - hdmi0: hdmi@7ef00700 { - compatible = "brcm,bcm2712-hdmi0"; - reg = <0x7c701400 0x300>, - <0x7c701000 0x200>, - <0x7c701d00 0x300>, - <0x7c702000 0x80>, - <0x7c703800 0x200>, - <0x7c704000 0x800>, - <0x7c700100 0x80>, - <0x7d510800 0x100>, - <0x7c720000 0x100>; - reg-names = "hdmi", - "dvp", - "phy", - "rm", - "packet", - "metadata", - "csc", - "cec", - "hd"; - resets = <&dvp 1>; - interrupt-parent = <&aon_intr>; - interrupts = <1>, <2>, <3>, - <7>, <8>; - interrupt-names = "cec-tx", "cec-rx", "cec-low", - "hpd-connected", "hpd-removed"; - ddc = <&ddc0>; - dmas = <&dma32 10>; - dma-names = "audio-rx"; - status = "disabled"; - }; - - hdmi1: hdmi@7ef05700 { - compatible = "brcm,bcm2712-hdmi1"; - reg = <0x7c706400 0x300>, - <0x7c706000 0x200>, - <0x7c706d00 0x300>, - <0x7c707000 0x80>, - <0x7c708800 0x200>, - <0x7c709000 0x800>, - <0x7c700180 0x80>, - <0x7d511000 0x100>, - <0x7c720000 0x100>; - reg-names = "hdmi", - "dvp", - "phy", - "rm", - "packet", - "metadata", - "csc", - "cec", - "hd"; - ddc = <&ddc1>; - resets = <&dvp 2>; - interrupt-parent = <&aon_intr>; - interrupts = <11>, <12>, <13>, - <14>, <15>; - interrupt-names = "cec-tx", "cec-rx", "cec-low", - "hpd-connected", "hpd-removed"; - dmas = <&dma32 17>; - dma-names = "audio-rx"; - status = "disabled"; - }; - }; - - arm-pmu { - compatible = "arm,cortex-a76-pmu"; - interrupts = , - , - , - ; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = , - , - , - ; - /* This only applies to the ARMv7 stub */ - arm,cpu-registers-not-fw-configured; - }; - - cpus: cpus { - #address-cells = <1>; - #size-cells = <0>; - enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit - - /* Source for d/i cache-line-size, cache-sets, cache-size - * https://developer.arm.com/documentation/100798/0401 - * /L1-memory-system/About-the-L1-memory-system?lang=en - */ - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x000>; - enable-method = "psci"; - d-cache-size = <0x10000>; - d-cache-line-size = <64>; - d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - i-cache-size = <0x10000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - next-level-cache = <&l2_cache_l0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x100>; - enable-method = "psci"; - d-cache-size = <0x10000>; - d-cache-line-size = <64>; - d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - i-cache-size = <0x10000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - next-level-cache = <&l2_cache_l1>; - }; - - cpu2: cpu@2 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x200>; - enable-method = "psci"; - d-cache-size = <0x10000>; - d-cache-line-size = <64>; - d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - i-cache-size = <0x10000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - next-level-cache = <&l2_cache_l2>; - }; - - cpu3: cpu@3 { - device_type = "cpu"; - compatible = "arm,cortex-a76"; - reg = <0x300>; - enable-method = "psci"; - d-cache-size = <0x10000>; - d-cache-line-size = <64>; - d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - i-cache-size = <0x10000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set - next-level-cache = <&l2_cache_l3>; - }; - - /* Source for cache-line-size and cache-sets: - * https://developer.arm.com/documentation/100798/0401 - * /L2-memory-system/About-the-L2-memory-system?lang=en - * and for cache-size: - * https://www.raspberrypi.com/documentation/computers - * /processors.html#bcm2712 - */ - l2_cache_l0: l2-cache-l0 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <128>; - cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_l1: l2-cache-l1 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <128>; - cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_l2: l2-cache-l2 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <128>; - cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - l2_cache_l3: l2-cache-l3 { - compatible = "cache"; - cache-size = <0x80000>; - cache-line-size = <128>; - cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set - cache-level = <2>; - cache-unified; - next-level-cache = <&l3_cache>; - }; - - /* Source for cache-line-size and cache-sets: - * https://developer.arm.com/documentation/100453/0401/L3-cache?lang=en - * Source for cache-size: - * https://www.raspberrypi.com/documentation/computers/processors.html#bcm2712 - */ - l3_cache: l3-cache { - compatible = "cache"; - cache-size = <0x200000>; - cache-line-size = <64>; - cache-sets = <2048>; // 2MiB(size)/64(line-size)=32768ways/16-way set - cache-level = <3>; - }; - }; - - psci { - method = "smc"; - compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci"; - cpu_on = <0xc4000003>; - cpu_suspend = <0xc4000001>; - cpu_off = <0x84000002>; - }; - - axi: axi { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - - ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>, - <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>, - <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>, - <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>, - <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>; - - dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>, - <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>, - <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>, - <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>, - <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>; - - vc4: gpu { - compatible = "brcm,bcm2712-vc6"; - }; - - iommu2: iommu@5100 { - /* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */ - compatible = "brcm,bcm2712-iommu"; - reg = <0x10 0x5100 0x0 0x80>; - cache = <&iommuc>; - #iommu-cells = <0>; - }; - - iommu4: iommu@5200 { - /* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */ - compatible = "brcm,bcm2712-iommu"; - reg = <0x10 0x5200 0x0 0x80>; - cache = <&iommuc>; - #iommu-cells = <0>; - #interconnect-cells = <0>; - }; - - iommu5: iommu@5280 { - /* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */ - compatible = "brcm,bcm2712-iommu"; - reg = <0x10 0x5280 0x0 0x80>; - cache = <&iommuc>; - #iommu-cells = <0>; - dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe - }; - - iommuc: iommuc@5b00 { - compatible = "brcm,bcm2712-iommuc"; - reg = <0x10 0x5b00 0x0 0x80>; - }; - - dma32: dma@10000 { - compatible = "brcm,bcm2712-dma"; - reg = <0x10 0x00010000 0 0x600>; - interrupts = , - , - , - , - , - ; - interrupt-names = "dma0", - "dma1", - "dma2", - "dma3", - "dma4", - "dma5"; - #dma-cells = <1>; - brcm,dma-channel-mask = <0x0035>; - }; - - dma40: dma@10600 { - compatible = "brcm,bcm2712-dma"; - reg = <0x10 0x00010600 0 0x600>; - interrupts = - , /* dma4 6 */ - , /* dma4 7 */ - , /* dma4 8 */ - , /* dma4 9 */ - , /* dma4 10 */ - ; /* dma4 11 */ - interrupt-names = "dma6", - "dma7", - "dma8", - "dma9", - "dma10", - "dma11"; - #dma-cells = <1>; - brcm,dma-channel-mask = <0x0fc0>; - }; - - // Single-lane Gen3 PCIe - // Outbound window at 0x14_000000-0x17_ffffff - pcie0: pcie@100000 { - compatible = "brcm,bcm2712-pcie"; - reg = <0x10 0x00100000 0x0 0x9310>; - device_type = "pci"; - max-link-speed = <2>; - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - /* - * Unused interrupts: - * 208: AER - * 215: NMI - * 216: PME - */ - interrupt-parent = <&gicv2>; - interrupts = , - ; - interrupt-names = "pcie", "msi"; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &gicv2 GIC_SPI 210 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &gicv2 GIC_SPI 211 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &gicv2 GIC_SPI 212 - IRQ_TYPE_LEVEL_HIGH>; - resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>; - reset-names = "swinit", "bridge", "rescal"; - msi-controller; - msi-parent = <&pcie0>; - - ranges = <0x02000000 0x00 0x00000000 - 0x17 0x00000000 - 0x0 0xfffffffc>, - <0x43000000 0x04 0x00000000 - 0x14 0x00000000 - 0x3 0x00000000>; - - dma-ranges = <0x43000000 0x10 0x00000000 - 0x00 0x00000000 - 0x10 0x00000000>; - - status = "disabled"; - }; - - // Single-lane Gen3 PCIe - // Outbound window at 0x18_000000-0x1b_ffffff - pcie1: pcie@110000 { - compatible = "brcm,bcm2712-pcie"; - reg = <0x10 0x00110000 0x0 0x9310>; - device_type = "pci"; - max-link-speed = <2>; - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - /* - * Unused interrupts: - * 218: AER - * 225: NMI - * 226: PME - */ - interrupt-parent = <&gicv2>; - interrupts = , - ; - interrupt-names = "pcie", "msi"; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &gicv2 GIC_SPI 220 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &gicv2 GIC_SPI 221 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &gicv2 GIC_SPI 222 - IRQ_TYPE_LEVEL_HIGH>; - resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>; - reset-names = "swinit", "bridge", "rescal"; - msi-controller; - msi-parent = <&mip1>; - - ranges = <0x02000000 0x00 0x00000000 - 0x1b 0x00000000 - 0x00 0xfffffffc>, - <0x43000000 0x04 0x00000000 - 0x18 0x00000000 - 0x03 0x00000000>; - - dma-ranges = <0x03000000 0x10 0x00000000 - 0x00 0x00000000 - 0x10 0x00000000>; - - status = "disabled"; - }; - - pcie_rescal: reset-controller@119500 { - compatible = "brcm,bcm7216-pcie-sata-rescal"; - reg = <0x10 0x00119500 0x0 0x10>; - #reset-cells = <0>; - }; - - // Quad-lane Gen3 PCIe - // Outbound window at 0x1c_000000-0x1f_ffffff - pcie2: pcie@120000 { - compatible = "brcm,bcm2712-pcie"; - reg = <0x10 0x00120000 0x0 0x9310>; - device_type = "pci"; - max-link-speed = <2>; - #address-cells = <3>; - #interrupt-cells = <1>; - #size-cells = <2>; - /* - * Unused interrupts: - * 228: AER - * 235: NMI - * 236: PME - */ - interrupt-parent = <&gicv2>; - interrupts = , - ; - interrupt-names = "pcie", "msi"; - interrupt-map-mask = <0x0 0x0 0x0 0x7>; - interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &gicv2 GIC_SPI 230 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &gicv2 GIC_SPI 231 - IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &gicv2 GIC_SPI 232 - IRQ_TYPE_LEVEL_HIGH>; - resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>; - reset-names = "swinit", "bridge", "rescal"; - msi-controller; - msi-parent = <&mip0>; - - // ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000 - ranges = <0x02000000 0x00 0x00000000 - 0x1f 0x00000000 - 0x0 0xfffffffc>, - // 12GB, 64-bit, prefetchable at PCIe 04_00000000 - <0x43000000 0x04 0x00000000 - 0x1c 0x00000000 - 0x03 0x00000000>; - - // 64GB system RAM space at PCIe 10_00000000 - dma-ranges = <0x02000000 0x00 0x00000000 - 0x1f 0x00000000 - 0x00 0x00400000>, - <0x43000000 0x10 0x00000000 - 0x00 0x00000000 - 0x10 0x00000000>; - - status = "disabled"; - }; - - mip0: msi-controller@130000 { - compatible = "brcm,bcm2712-mip-intc"; - reg = <0x10 0x00130000 0x0 0xc0>; - msi-controller; - interrupt-controller; - #interrupt-cells = <2>; - brcm,msi-base-spi = <128>; - brcm,msi-num-spis = <64>; - brcm,msi-offset = <0>; - brcm,msi-pci-addr = <0xff 0xfffff000>; - }; - - mip1: msi-controller@131000 { - compatible = "brcm,bcm2712-mip-intc"; - reg = <0x10 0x00131000 0x0 0xc0>; - msi-controller; - interrupt-controller; - #interrupt-cells = <2>; - brcm,msi-base-spi = <247>; - /* Actually 20 total, but the others are - * both sparse and non-consecutive */ - brcm,msi-num-spis = <8>; - brcm,msi-offset = <8>; - brcm,msi-pci-addr = <0xff 0xffffe000>; - }; - - syscon_piarbctl: syscon@400018 { - compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd"; - reg = <0x10 0x00400018 0x0 0x18>; - }; - - usb: usb@480000 { - compatible = "brcm,bcm2835-usb"; - reg = <0x10 0x00480000 0x0 0x10000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clocks = <&clk_usb>; - clock-names = "otg"; - phys = <&usbphy>; - phy-names = "usb2-phy"; - status = "disabled"; - }; - - rpivid: codec@800000 { - compatible = "raspberrypi,rpivid-vid-decoder"; - reg = <0x10 0x00800000 0x0 0x10000>, /* HEVC */ - <0x10 0x00840000 0x0 0x1000>; /* INTC */ - reg-names = "hevc", - "intc"; - - interrupts = ; - - clocks = <&firmware_clocks 11>; - clock-names = "hevc"; - iommus = <&iommu2>; - status = "disabled"; - }; - - sdio1: mmc@fff000 { - compatible = "brcm,bcm2712-sdhci"; - reg = <0x10 0x00fff000 0x0 0x260>, - <0x10 0x00fff400 0x0 0x200>, - <0x10 0x015040b0 0x0 0x4>, // Bus isolation control - <0x10 0x015200f0 0x0 0x24>; // LCPLL control misc0-8 - reg-names = "host", "cfg", "busisol", "lcpll"; - interrupts = ; - clocks = <&clk_emmc2>; - sdhci-caps-mask = <0x0000C000 0x0>; - sdhci-caps = <0x0 0x0>; - mmc-ddr-3_3v; - }; - - sdio2: mmc@1100000 { - compatible = "brcm,bcm2712-sdhci"; - reg = <0x10 0x01100000 0x0 0x260>, - <0x10 0x01100400 0x0 0x200>; - reg-names = "host", "cfg"; - interrupts = ; - clocks = <&clk_emmc2>; - sdhci-caps-mask = <0x0000C000 0x0>; - sdhci-caps = <0x0 0x0>; - supports-cqe; - mmc-ddr-3_3v; - status = "disabled"; - }; - - bcm_reset: reset-controller@1504318 { - compatible = "brcm,brcmstb-reset"; - reg = <0x10 0x01504318 0x0 0x30>; - #reset-cells = <1>; - }; - - v3d: v3d@2000000 { - compatible = "brcm,2712-v3d"; - reg = <0x10 0x02000000 0x0 0x4000>, - <0x10 0x02008000 0x0 0x6000>; - reg-names = "hub", "core0"; - - power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; - resets = <&pm BCM2835_RESET_V3D>; - clocks = <&firmware_clocks 5>; - clocks-names = "v3d"; - interrupts = , - ; - status = "disabled"; - }; - - gicv2: interrupt-controller@7fff9000 { - interrupt-controller; - #interrupt-cells = <3>; - compatible = "arm,gic-400"; - reg = <0x10 0x7fff9000 0x0 0x1000>, - <0x10 0x7fffa000 0x0 0x2000>, - <0x10 0x7fffc000 0x0 0x2000>, - <0x10 0x7fffe000 0x0 0x2000>; - interrupts = ; - }; - - pisp_be: pisp_be@880000 { - compatible = "raspberrypi,pispbe"; - reg = <0x10 0x00880000 0x0 0x4000>; - interrupts = ; - clocks = <&firmware_clocks 7>; - clocks-names = "isp_be"; - status = "okay"; - iommus = <&iommu2>; - }; - }; - - clocks { - /* The oscillator is the root of the clock tree. */ - clk_osc: clk-osc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "osc"; - clock-frequency = <54000000>; - }; - - clk_usb: clk-usb { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "otg"; - clock-frequency = <480000000>; - }; - - clk_vpu: clk_vpu { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <750000000>; - clock-output-names = "vpu-clock"; - }; - - clk_uart: clk_uart { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <9216000>; - clock-output-names = "uart-clock"; - }; - - clk_emmc2: clk_emmc2 { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <200000000>; - clock-output-names = "emmc2-clock"; - }; - }; - - usbphy: phy { - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; - }; -}; --- a/arch/arm/boot/dts/broadcom/rp1.dtsi +++ /dev/null @@ -1,1287 +0,0 @@ -#include -#include -#include - -&rp1_target { - rp1: rp1 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - #interrupt-cells = <2>; - interrupt-controller; - interrupt-parent = <&rp1>; - - // ranges and dma-ranges must be provided by the includer - - rp1_clocks: clocks@18000 { - compatible = "raspberrypi,rp1-clocks"; - #clock-cells = <1>; - reg = <0xc0 0x40018000 0x0 0x10038>; - clocks = <&clk_xosc>; - - assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>, - <&rp1_clocks RP1_PLL_AUDIO_CORE>, - // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers - <&rp1_clocks RP1_PLL_SYS>, - <&rp1_clocks RP1_PLL_SYS_SEC>, - <&rp1_clocks RP1_PLL_AUDIO>, - <&rp1_clocks RP1_PLL_AUDIO_SEC>, - <&rp1_clocks RP1_CLK_SYS>, - <&rp1_clocks RP1_PLL_SYS_PRI_PH>, - // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0) - <&rp1_clocks RP1_CLK_SLOW_SYS>, - <&rp1_clocks RP1_CLK_SDIO_TIMER>, - <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>, - <&rp1_clocks RP1_CLK_ETH_TSU>; - - assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE - <1536000000>, // RP1_PLL_AUDIO_CORE - <200000000>, // RP1_PLL_SYS - <125000000>, // RP1_PLL_SYS_SEC - <61440000>, // RP1_PLL_AUDIO - <192000000>, // RP1_PLL_AUDIO_SEC - <200000000>, // RP1_CLK_SYS - <100000000>, // RP1_PLL_SYS_PRI_PH - // Must match the XOSC frequency - <50000000>, // RP1_CLK_SLOW_SYS - <1000000>, // RP1_CLK_SDIO_TIMER - <200000000>, // RP1_CLK_SDIO_ALT_SRC - <50000000>; // RP1_CLK_ETH_TSU - }; - - rp1_uart0: serial@30000 { - compatible = "arm,pl011-axi"; - reg = <0xc0 0x40030000 0x0 0x100>; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; - clock-names = "uartclk", "apb_pclk"; - dmas = <&rp1_dma RP1_DMA_UART0_TX>, - <&rp1_dma RP1_DMA_UART0_RX>; - dma-names = "tx", "rx"; - pinctrl-names = "default"; - arm,primecell-periphid = <0x00541011>; - uart-has-rtscts; - cts-event-workaround; - skip-init; - status = "disabled"; - }; - - rp1_uart1: serial@34000 { - compatible = "arm,pl011-axi"; - reg = <0xc0 0x40034000 0x0 0x100>; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; - clock-names = "uartclk", "apb_pclk"; - // dmas = <&rp1_dma RP1_DMA_UART1_TX>, - // <&rp1_dma RP1_DMA_UART1_RX>; - // dma-names = "tx", "rx"; - pinctrl-names = "default"; - arm,primecell-periphid = <0x00541011>; - uart-has-rtscts; - cts-event-workaround; - skip-init; - status = "disabled"; - }; - - rp1_uart2: serial@38000 { - compatible = "arm,pl011-axi"; - reg = <0xc0 0x40038000 0x0 0x100>; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; - clock-names = "uartclk", "apb_pclk"; - // dmas = <&rp1_dma RP1_DMA_UART2_TX>, - // <&rp1_dma RP1_DMA_UART2_RX>; - // dma-names = "tx", "rx"; - pinctrl-names = "default"; - arm,primecell-periphid = <0x00541011>; - uart-has-rtscts; - cts-event-workaround; - skip-init; - status = "disabled"; - }; - - rp1_uart3: serial@3c000 { - compatible = "arm,pl011-axi"; - reg = <0xc0 0x4003c000 0x0 0x100>; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; - clock-names = "uartclk", "apb_pclk"; - // dmas = <&rp1_dma RP1_DMA_UART3_TX>, - // <&rp1_dma RP1_DMA_UART3_RX>; - // dma-names = "tx", "rx"; - pinctrl-names = "default"; - arm,primecell-periphid = <0x00541011>; - uart-has-rtscts; - cts-event-workaround; - skip-init; - status = "disabled"; - }; - - rp1_uart4: serial@40000 { - compatible = "arm,pl011-axi"; - reg = <0xc0 0x40040000 0x0 0x100>; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; - clock-names = "uartclk", "apb_pclk"; - // dmas = <&rp1_dma RP1_DMA_UART4_TX>, - // <&rp1_dma RP1_DMA_UART4_RX>; - // dma-names = "tx", "rx"; - pinctrl-names = "default"; - arm,primecell-periphid = <0x00541011>; - uart-has-rtscts; - cts-event-workaround; - skip-init; - status = "disabled"; - }; - - rp1_uart5: serial@44000 { - compatible = "arm,pl011-axi"; - reg = <0xc0 0x40044000 0x0 0x100>; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; - clock-names = "uartclk", "apb_pclk"; - // dmas = <&rp1_dma RP1_DMA_UART5_TX>, - // <&rp1_dma RP1_DMA_UART5_RX>; - // dma-names = "tx", "rx"; - pinctrl-names = "default"; - arm,primecell-periphid = <0x00541011>; - uart-has-rtscts; - cts-event-workaround; - skip-init; - status = "disabled"; - }; - - rp1_spi8: spi@4c000 { - reg = <0xc0 0x4004c000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI8_TX>, - <&rp1_dma RP1_DMA_SPI8_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_spi0: spi@50000 { - reg = <0xc0 0x40050000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI0_TX>, - <&rp1_dma RP1_DMA_SPI0_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_spi1: spi@54000 { - reg = <0xc0 0x40054000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI1_TX>, - <&rp1_dma RP1_DMA_SPI1_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_spi2: spi@58000 { - reg = <0xc0 0x40058000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI2_TX>, - <&rp1_dma RP1_DMA_SPI2_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_spi3: spi@5c000 { - reg = <0xc0 0x4005c000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI3_TX>, - <&rp1_dma RP1_DMA_SPI3_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - // SPI4 is a target/slave interface - rp1_spi4: spi@60000 { - reg = <0xc0 0x40060000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <0>; - #size-cells = <0>; - num-cs = <1>; - spi-slave; - dmas = <&rp1_dma RP1_DMA_SPI4_TX>, - <&rp1_dma RP1_DMA_SPI4_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - - slave { - compatible = "spidev"; - spi-max-frequency = <1000000>; - }; - }; - - rp1_spi5: spi@64000 { - reg = <0xc0 0x40064000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI5_TX>, - <&rp1_dma RP1_DMA_SPI5_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_spi6: spi@68000 { - reg = <0xc0 0x40068000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <1>; - #size-cells = <0>; - num-cs = <2>; - dmas = <&rp1_dma RP1_DMA_SPI6_TX>, - <&rp1_dma RP1_DMA_SPI6_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - // SPI7 is a target/slave interface - rp1_spi7: spi@6c000 { - reg = <0xc0 0x4006c000 0x0 0x130>; - compatible = "snps,dw-apb-ssi"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - clock-names = "ssi_clk"; - #address-cells = <0>; - #size-cells = <0>; - num-cs = <1>; - spi-slave; - dmas = <&rp1_dma RP1_DMA_SPI7_TX>, - <&rp1_dma RP1_DMA_SPI7_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - - slave { - compatible = "spidev"; - spi-max-frequency = <1000000>; - }; - }; - - rp1_i2c0: i2c@70000 { - reg = <0xc0 0x40070000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_i2c1: i2c@74000 { - reg = <0xc0 0x40074000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_i2c2: i2c@78000 { - reg = <0xc0 0x40078000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_i2c3: i2c@7c000 { - reg = <0xc0 0x4007c000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_i2c4: i2c@80000 { - reg = <0xc0 0x40080000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_i2c5: i2c@84000 { - reg = <0xc0 0x40084000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_i2c6: i2c@88000 { - reg = <0xc0 0x40088000 0x0 0x1000>; - compatible = "snps,designware-i2c"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS>; - i2c-scl-rising-time-ns = <65>; - i2c-scl-falling-time-ns = <100>; - status = "disabled"; - }; - - rp1_pwm0: pwm@98000 { - compatible = "raspberrypi,rp1-pwm"; - reg = <0xc0 0x40098000 0x0 0x100>; - #pwm-cells = <3>; - clocks = <&rp1_clocks RP1_CLK_PWM0>; - assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>; - assigned-clock-rates = <50000000>; - status = "disabled"; - }; - - rp1_pwm1: pwm@9c000 { - compatible = "raspberrypi,rp1-pwm"; - reg = <0xc0 0x4009c000 0x0 0x100>; - #pwm-cells = <3>; - clocks = <&rp1_clocks RP1_CLK_PWM1>; - assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>; - assigned-clock-rates = <50000000>; - status = "disabled"; - }; - - rp1_i2s0: i2s@a0000 { - reg = <0xc0 0x400a0000 0x0 0x1000>; - compatible = "snps,designware-i2s"; - // Providing an interrupt disables DMA - // interrupts = ; - clocks = <&rp1_clocks RP1_CLK_I2S>; - clock-names = "i2sclk"; - #sound-dai-cells = <0>; - dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_i2s1: i2s@a4000 { - reg = <0xc0 0x400a4000 0x0 0x1000>; - compatible = "snps,designware-i2s"; - // Providing an interrupt disables DMA - // interrupts = ; - clocks = <&rp1_clocks RP1_CLK_I2S>; - clock-names = "i2sclk"; - #sound-dai-cells = <0>; - dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>; - dma-names = "tx", "rx"; - status = "disabled"; - }; - - rp1_i2s2: i2s@a8000 { - reg = <0xc0 0x400a8000 0x0 0x1000>; - compatible = "snps,designware-i2s"; - // Providing an interrupt disables DMA - // interrupts = ; - clocks = <&rp1_clocks RP1_CLK_I2S>; - status = "disabled"; - }; - - rp1_sdio_clk0: sdio_clk0@b0004 { - compatible = "raspberrypi,rp1-sdio-clk"; - reg = <0xc0 0x400b0004 0x0 0x1c>; - clocks = <&sdio_src &sdhci_core>; - clock-names = "src", "base"; - #clock-cells = <0>; - status = "disabled"; - }; - - rp1_sdio_clk1: sdio_clk1@b4004 { - compatible = "raspberrypi,rp1-sdio-clk"; - reg = <0xc0 0x400b4004 0x0 0x1c>; - clocks = <&sdio_src &sdhci_core>; - clock-names = "src", "base"; - #clock-cells = <0>; - status = "disabled"; - }; - - rp1_adc: adc@c8000 { - compatible = "raspberrypi,rp1-adc"; - reg = <0xc0 0x400c8000 0x0 0x4000>; - clocks = <&rp1_clocks RP1_CLK_ADC>; - clock-names = "adcclk"; - #clock-cells = <0>; - vref-supply = <&rp1_vdd_3v3>; - status = "disabled"; - }; - - rp1_gpio: gpio@d0000 { - reg = <0xc0 0x400d0000 0x0 0xc000>, - <0xc0 0x400e0000 0x0 0xc000>, - <0xc0 0x400f0000 0x0 0xc000>; - compatible = "raspberrypi,rp1-gpio"; - interrupts = , - , - ; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&rp1_gpio 0 0 54>; - - rp1_uart0_14_15: rp1_uart0_14_15 { - pin_txd { - function = "uart0"; - pins = "gpio14"; - bias-disable; - }; - pin_rxd { - function = "uart0"; - pins = "gpio15"; - bias-pull-up; - }; - }; - rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 { - pin_cts { - function = "uart0"; - pins = "gpio16"; - bias-pull-up; - }; - pin_rts { - function = "uart0"; - pins = "gpio17"; - bias-disable; - }; - }; - rp1_uart1_0_1: rp1_uart1_0_1 { - pin_txd { - function = "uart1"; - pins = "gpio0"; - bias-disable; - }; - pin_rxd { - function = "uart1"; - pins = "gpio1"; - bias-pull-up; - }; - }; - rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 { - pin_cts { - function = "uart1"; - pins = "gpio2"; - bias-pull-up; - }; - pin_rts { - function = "uart1"; - pins = "gpio3"; - bias-disable; - }; - }; - rp1_uart2_4_5: rp1_uart2_4_5 { - pin_txd { - function = "uart2"; - pins = "gpio4"; - bias-disable; - }; - pin_rxd { - function = "uart2"; - pins = "gpio5"; - bias-pull-up; - }; - }; - rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 { - pin_cts { - function = "uart2"; - pins = "gpio6"; - bias-pull-up; - }; - pin_rts { - function = "uart2"; - pins = "gpio7"; - bias-disable; - }; - }; - rp1_uart3_8_9: rp1_uart3_8_9 { - pin_txd { - function = "uart3"; - pins = "gpio8"; - bias-disable; - }; - pin_rxd { - function = "uart3"; - pins = "gpio9"; - bias-pull-up; - }; - }; - rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 { - pin_cts { - function = "uart3"; - pins = "gpio10"; - bias-pull-up; - }; - pin_rts { - function = "uart3"; - pins = "gpio11"; - bias-disable; - }; - }; - rp1_uart4_12_13: rp1_uart4_12_13 { - pin_txd { - function = "uart4"; - pins = "gpio12"; - bias-disable; - }; - pin_rxd { - function = "uart4"; - pins = "gpio13"; - bias-pull-up; - }; - }; - rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 { - pin_cts { - function = "uart4"; - pins = "gpio14"; - bias-pull-up; - }; - pin_rts { - function = "uart4"; - pins = "gpio15"; - bias-disable; - }; - }; - - rp1_sdio0_22_27: rp1_sdio0_22_27 { - pin_clk { - function = "sd0"; - pins = "gpio22"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - pin_cmd { - function = "sd0"; - pins = "gpio23"; - bias-pull-up; - drive-strength = <12>; - slew-rate = <1>; - }; - pins_dat { - function = "sd0"; - pins = "gpio24", "gpio25", "gpio26", "gpio27"; - bias-pull-up; - drive-strength = <12>; - slew-rate = <1>; - }; - }; - - rp1_sdio1_28_33: rp1_sdio1_28_33 { - pin_clk { - function = "sd1"; - pins = "gpio28"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - pin_cmd { - function = "sd1"; - pins = "gpio29"; - bias-pull-up; - drive-strength = <12>; - slew-rate = <1>; - }; - pins_dat { - function = "sd1"; - pins = "gpio30", "gpio31", "gpio32", "gpio33"; - bias-pull-up; - drive-strength = <12>; - slew-rate = <1>; - }; - }; - - rp1_i2s0_18_21: rp1_i2s0_18_21 { - function = "i2s0"; - pins = "gpio18", "gpio19", "gpio20", "gpio21"; - bias-disable; - }; - - rp1_i2s1_18_21: rp1_i2s1_18_21 { - function = "i2s1"; - pins = "gpio18", "gpio19", "gpio20", "gpio21"; - bias-disable; - }; - - rp1_i2c4_34_35: rp1_i2c4_34_35 { - function = "i2c4"; - pins = "gpio34", "gpio35"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c6_38_39: rp1_i2c6_38_39 { - function = "i2c6"; - pins = "gpio38", "gpio39"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c4_40_41: rp1_i2c4_40_41 { - function = "i2c4"; - pins = "gpio40", "gpio41"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c5_44_45: rp1_i2c5_44_45 { - function = "i2c5"; - pins = "gpio44", "gpio45"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c0_0_1: rp1_i2c0_0_1 { - function = "i2c0"; - pins = "gpio0", "gpio1"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c0_8_9: rp1_i2c0_8_9 { - function = "i2c0"; - pins = "gpio8", "gpio9"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c1_2_3: rp1_i2c1_2_3 { - function = "i2c1"; - pins = "gpio2", "gpio3"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c1_10_11: rp1_i2c1_10_11 { - function = "i2c1"; - pins = "gpio10", "gpio11"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c2_4_5: rp1_i2c2_4_5 { - function = "i2c2"; - pins = "gpio4", "gpio5"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c2_12_13: rp1_i2c2_12_13 { - function = "i2c2"; - pins = "gpio12", "gpio13"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c3_6_7: rp1_i2c3_6_7 { - function = "i2c3"; - pins = "gpio6", "gpio7"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c3_14_15: rp1_i2c3_14_15 { - function = "i2c3"; - pins = "gpio14", "gpio15"; - drive-strength = <12>; - bias-pull-up; - }; - rp1_i2c3_22_23: rp1_i2c3_22_23 { - function = "i2c3"; - pins = "gpio22", "gpio23"; - drive-strength = <12>; - bias-pull-up; - }; - - // DPI mappings with HSYNC,VSYNC but without PIXCLK,DE - rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */ - function = "dpi"; - pins = "gpio2", "gpio3", "gpio4", "gpio5", - "gpio6", "gpio7", "gpio8", "gpio9", - "gpio10", "gpio11", "gpio12", "gpio13", - "gpio14", "gpio15", "gpio16", "gpio17", - "gpio18", "gpio19"; - bias-disable; - }; - rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */ - function = "dpi"; - pins = "gpio2", "gpio3", "gpio4", "gpio5", - "gpio6", "gpio7", "gpio8", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", - "gpio20", "gpio21", "gpio22", "gpio23", - "gpio24"; - bias-disable; - }; - rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */ - function = "dpi"; - pins = "gpio2", "gpio3", - "gpio5", "gpio6", "gpio7", "gpio8", - "gpio9", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", - "gpio21", "gpio22", "gpio23", "gpio24", - "gpio25"; - bias-disable; - }; - rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */ - function = "dpi"; - pins = "gpio2", "gpio3", "gpio4", "gpio5", - "gpio6", "gpio7", "gpio8", "gpio9", - "gpio10", "gpio11", "gpio12", "gpio13", - "gpio14", "gpio15", "gpio16", "gpio17", - "gpio18", "gpio19", "gpio20", "gpio21"; - bias-disable; - }; - rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */ - function = "dpi"; - pins = "gpio2", "gpio3", "gpio4", "gpio5", - "gpio6", "gpio7", "gpio8", "gpio9", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", - "gpio20", "gpio21", "gpio22", "gpio23", - "gpio24", "gpio25"; - bias-disable; - }; - rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */ - function = "dpi"; - pins = "gpio2", "gpio3", "gpio4", "gpio5", - "gpio6", "gpio7", "gpio8", "gpio9", - "gpio10", "gpio11", "gpio12", "gpio13", - "gpio14", "gpio15", "gpio16", "gpio17", - "gpio18", "gpio19", "gpio20", "gpio21", - "gpio22", "gpio23", "gpio24", "gpio25", - "gpio26", "gpio27"; - bias-disable; - }; - rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */ - function = "dpi"; - pins = "gpio2", "gpio3"; - bias-disable; - }; - - // More DPI mappings, including PIXCLK,DE on GPIOs 0,1 - rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */ - function = "dpi"; - pins = "gpio0", "gpio1", "gpio2", "gpio3", - "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", "gpio9", "gpio10", "gpio11", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", "gpio18", "gpio19"; - bias-disable; - }; - rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */ - function = "dpi"; - pins = "gpio0", "gpio1", "gpio2", "gpio3", - "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", - "gpio20", "gpio21", "gpio22", "gpio23", - "gpio24"; - bias-disable; - }; - rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */ - function = "dpi"; - pins = "gpio0", "gpio1", "gpio2", "gpio3", - "gpio5", "gpio6", "gpio7", "gpio8", - "gpio9", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", - "gpio21", "gpio22", "gpio23", "gpio24", - "gpio25"; - bias-disable; - }; - rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */ - function = "dpi"; - pins = "gpio0", "gpio1", "gpio2", "gpio3", - "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", "gpio9", "gpio10", "gpio11", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", "gpio18", "gpio19", - "gpio20", "gpio21"; - bias-disable; - }; - rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */ - function = "dpi"; - pins = "gpio0", "gpio1", "gpio2", "gpio3", - "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", "gpio9", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", - "gpio20", "gpio21", "gpio22", "gpio23", - "gpio24", "gpio25"; - bias-disable; - }; - rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */ - function = "dpi"; - pins = "gpio0", "gpio1", "gpio2", "gpio3", - "gpio4", "gpio5", "gpio6", "gpio7", - "gpio8", "gpio9", "gpio10", "gpio11", - "gpio12", "gpio13", "gpio14", "gpio15", - "gpio16", "gpio17", "gpio18", "gpio19", - "gpio20", "gpio21", "gpio22", "gpio23", - "gpio24", "gpio25", "gpio26", "gpio27"; - bias-disable; - }; - - rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 { - function = "gpclk0"; - pins = "gpio4"; - bias-disable; - }; - - rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 { - function = "gpclk0"; - pins = "gpio20"; - bias-disable; - }; - - rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 { - function = "gpclk1"; - pins = "gpio5"; - bias-disable; - }; - - rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 { - function = "gpclk1"; - pins = "gpio18"; - bias-disable; - }; - - rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 { - function = "gpclk1"; - pins = "gpio21"; - bias-disable; - }; - - rp1_pwm1_gpio45: rp1_pwm1_gpio45 { - function = "pwm1"; - pins = "gpio45"; - bias-pull-down; - }; - - rp1_spi0_gpio9: rp1_spi0_gpio9 { - function = "spi0"; - pins = "gpio9", "gpio10", "gpio11"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 { - function = "spi0"; - pins = "gpio7", "gpio8"; - bias-pull-up; - }; - - rp1_spi1_gpio19: rp1_spi1_gpio19 { - function = "spi1"; - pins = "gpio19", "gpio20", "gpio21"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi2_gpio1: rp1_spi2_gpio1 { - function = "spi2"; - pins = "gpio1", "gpio2", "gpio3"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi3_gpio5: rp1_spi3_gpio5 { - function = "spi3"; - pins = "gpio5", "gpio6", "gpio7"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi4_gpio9: rp1_spi4_gpio9 { - function = "spi4"; - pins = "gpio9", "gpio10", "gpio11"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi5_gpio13: rp1_spi5_gpio13 { - function = "spi5"; - pins = "gpio13", "gpio14", "gpio15"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi8_gpio49: rp1_spi8_gpio49 { - function = "spi8"; - pins = "gpio49", "gpio50", "gpio51"; - bias-disable; - drive-strength = <12>; - slew-rate = <1>; - }; - - rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 { - function = "spi0"; - pins = "gpio52", "gpio53"; - bias-pull-up; - }; - }; - - rp1_eth: ethernet@100000 { - reg = <0xc0 0x40100000 0x0 0x4000>; - compatible = "cdns,macb"; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>; - clock-names = "pclk", "hclk", "tsu_clk"; - phy-mode = "rgmii-id"; - cdns,aw2w-max-pipe = /bits/ 8 <8>; - cdns,ar2r-max-pipe = /bits/ 8 <8>; - cdns,use-aw2b-fill; - local-mac-address = [00 00 00 00 00 00]; - status = "disabled"; - }; - - rp1_csi0: csi@110000 { - compatible = "raspberrypi,rp1-cfe"; - reg = <0xc0 0x40110000 0x0 0x100>, // CSI2 DMA address - <0xc0 0x40114000 0x0 0x100>, // PHY/CSI Host address - <0xc0 0x40120000 0x0 0x100>, // MIPI CFG address - <0xc0 0x40124000 0x0 0x1000>; // PiSP FE address - - // interrupts must match rp1_pisp_fe setup - interrupts = ; - - clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; - assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; - assigned-clock-rates = <25000000>; - - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - rp1_csi1: csi@128000 { - compatible = "raspberrypi,rp1-cfe"; - reg = <0xc0 0x40128000 0x0 0x100>, // CSI2 DMA address - <0xc0 0x4012c000 0x0 0x100>, // PHY/CSI Host address - <0xc0 0x40138000 0x0 0x100>, // MIPI CFG address - <0xc0 0x4013c000 0x0 0x1000>; // PiSP FE address - - // interrupts must match rp1_pisp_fe setup - interrupts = ; - - clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; - assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; - assigned-clock-rates = <25000000>; - - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; - - rp1_mmc0: mmc@180000 { - reg = <0xc0 0x40180000 0x0 0x100>; - compatible = "raspberrypi,rp1-dwcmshc"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core - &rp1_clocks RP1_CLK_SDIO_TIMER - &rp1_sdio_clk0>; - clock-names = "bus", "core", "timeout", "sdio"; - /* Bank 0 VDDIO is fixed */ - no-1-8-v; - bus-width = <4>; - vmmc-supply = <&rp1_vdd_3v3>; - broken-cd; - status = "disabled"; - }; - - rp1_mmc1: mmc@184000 { - reg = <0xc0 0x40184000 0x0 0x100>; - compatible = "raspberrypi,rp1-dwcmshc"; - interrupts = ; - clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core - &rp1_clocks RP1_CLK_SDIO_TIMER - &rp1_sdio_clk1>; - clock-names = "bus", "core", "timeout", "sdio"; - bus-width = <4>; - vmmc-supply = <&rp1_vdd_3v3>; - /* Nerf SDR speeds */ - sdhci-caps-mask = <0x3 0x0>; - broken-cd; - status = "disabled"; - }; - - rp1_dma: dma@188000 { - reg = <0xc0 0x40188000 0x0 0x1000>; - compatible = "snps,axi-dma-1.01a"; - interrupts = ; - clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>; - clock-names = "core-clk", "cfgr-clk"; - - #dma-cells = <1>; - dma-channels = <8>; - snps,dma-masters = <1>; - snps,dma-targets = <64>; - snps,data-width = <4>; // (8 << 4) == 128 bits - snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>; - snps,priority = <0 1 2 3 4 5 6 7>; - snps,axi-max-burst-len = <8>; - status = "disabled"; - }; - - rp1_usb0: usb@200000 { - reg = <0xc0 0x40200000 0x0 0x100000>; - compatible = "snps,dwc3"; - dr_mode = "host"; - usb3-lpm-capable; - snps,axi-pipe-limit = /bits/ 8 <8>; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-ss-quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-fsls-quirk; - snps,tx-max-burst = /bits/ 8 <8>; - snps,tx-thr-num-pkt = /bits/ 8 <2>; - interrupts = ; - status = "disabled"; - }; - - rp1_usb1: usb@300000 { - reg = <0xc0 0x40300000 0x0 0x100000>; - compatible = "snps,dwc3"; - dr_mode = "host"; - usb3-lpm-capable; - snps,axi-pipe-limit = /bits/ 8 <8>; - snps,dis_rxdet_inp3_quirk; - snps,parkmode-disable-ss-quirk; - snps,parkmode-disable-hs-quirk; - snps,parkmode-disable-fsls-quirk; - snps,tx-max-burst = /bits/ 8 <8>; - snps,tx-thr-num-pkt = /bits/ 8 <2>; - interrupts = ; - status = "disabled"; - }; - - rp1_dsi0: dsi@110000 { - compatible = "raspberrypi,rp1dsi"; - status = "disabled"; - reg = <0xc0 0x40118000 0x0 0x1000>, // MIPI0 DSI DMA (ArgonDPI) - <0xc0 0x4011c000 0x0 0x1000>, // MIPI0 DSI Host (SNPS) - <0xc0 0x40120000 0x0 0x1000>; // MIPI0 CFG - - interrupts = ; - - clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>, - <&rp1_clocks RP1_CLK_MIPI0_DPI>, - <&rp1_clocks RP1_CLK_MIPI0_DSI_BYTECLOCK>, - <&clk_xosc>, // hardwired to DSI "refclk" - <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide - clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys"; - - assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; - assigned-clock-rates = <25000000>; - }; - - rp1_dsi1: dsi@128000 { - compatible = "raspberrypi,rp1dsi"; - status = "disabled"; - reg = <0xc0 0x40130000 0x0 0x1000>, // MIPI1 DSI DMA (ArgonDPI) - <0xc0 0x40134000 0x0 0x1000>, // MIPI1 DSI Host (SNPS) - <0xc0 0x40138000 0x0 0x1000>; // MIPI1 CFG - - interrupts = ; - - clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>, - <&rp1_clocks RP1_CLK_MIPI1_DPI>, - <&rp1_clocks RP1_CLK_MIPI1_DSI_BYTECLOCK>, - <&clk_xosc>, // hardwired to DSI "refclk" - <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide - clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys"; - - assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; - assigned-clock-rates = <25000000>; - }; - - /* VEC and DPI both need to control PLL_VIDEO and cannot work together; */ - /* config.txt should enable one or other using dtparam=vec or an overlay. */ - rp1_vec: vec@144000 { - compatible = "raspberrypi,rp1vec"; - status = "disabled"; - reg = <0xc0 0x40144000 0x0 0x1000>, // VIDEO_OUT_VEC - <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG - - interrupts = ; - - clocks = <&rp1_clocks RP1_CLK_VEC>; - - assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>, - <&rp1_clocks RP1_PLL_VIDEO_SEC>, - <&rp1_clocks RP1_CLK_VEC>; - assigned-clock-rates = <1188000000>, - <108000000>, - <108000000>; - assigned-clock-parents = <0>, - <&rp1_clocks RP1_PLL_VIDEO_CORE>, - <&rp1_clocks RP1_PLL_VIDEO_SEC>; - }; - - rp1_dpi: dpi@148000 { - compatible = "raspberrypi,rp1dpi"; - status = "disabled"; - reg = <0xc0 0x40148000 0x0 0x1000>, // VIDEO_OUT DPI - <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG - - interrupts = ; - - clocks = <&rp1_clocks RP1_CLK_DPI>, // DPI pixel clock - <&rp1_clocks RP1_PLL_VIDEO>, // PLL primary divider, and - <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control - clock-names = "dpiclk", "plldiv", "pllcore"; - - assigned-clocks = <&rp1_clocks RP1_CLK_DPI>; - assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>; - }; - }; -}; - -&clocks { - clk_xosc: clk_xosc { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "xosc"; - clock-frequency = <50000000>; - }; - macb_pclk: macb_pclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "pclk"; - clock-frequency = <200000000>; - }; - macb_hclk: macb_hclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "hclk"; - clock-frequency = <200000000>; - }; - sdio_src: sdio_src { - // 400 MHz on FPGA. PLL sys VCO on asic - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "src"; - clock-frequency = <1000000000>; - }; - sdhci_core: sdhci_core { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "core"; - clock-frequency = <50000000>; - }; - /* GPIO derived clock sources. Each GPIO with a GPCLK function - * can drive its output from the respective GPCLK - * generator, and provide a clock source to other internal - * dividers. Add dummy sources here so that they can be overridden - * with overlays. - */ - clksrc_gp0: clksrc_gp0 { - status = "disabled"; - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&rp1_clocks RP1_CLK_GP0>; - clock-output-names = "clksrc_gp0"; - }; - clksrc_gp1: clksrc_gp1 { - status = "disabled"; - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&rp1_clocks RP1_CLK_GP1>; - clock-output-names = "clksrc_gp1"; - }; - clksrc_gp2: clksrc_gp2 { - status = "disabled"; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - clocks = <&rp1_clocks RP1_CLK_GP2>; - clock-output-names = "clksrc_gp2"; - }; - clksrc_gp3: clksrc_gp3 { - status = "disabled"; - compatible = "fixed-factor-clock"; - clock-div = <1>; - clock-mult = <1>; - #clock-cells = <0>; - clocks = <&rp1_clocks RP1_CLK_GP3>; - clock-output-names = "clksrc_gp3"; - }; - clksrc_gp4: clksrc_gp4 { - status = "disabled"; - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&rp1_clocks RP1_CLK_GP4>; - clock-output-names = "clksrc_gp4"; - }; - clksrc_gp5: clksrc_gp5 { - status = "disabled"; - compatible = "fixed-factor-clock"; - #clock-cells = <0>; - clock-div = <1>; - clock-mult = <1>; - clocks = <&rp1_clocks RP1_CLK_GP5>; - clock-output-names = "clksrc_gp5"; - }; -}; - -/ { - rp1_vdd_3v3: rp1_vdd_3v3 { - compatible = "regulator-fixed"; - regulator-name = "vdd-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; -}; --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi.dtsi @@ -0,0 +1,351 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +&soc { + firmware: firmware { + compatible = "raspberrypi,bcm2835-firmware", "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + + mboxes = <&mailbox>; + dma-ranges; + + firmware_clocks: clocks { + compatible = "raspberrypi,firmware-clocks"; + #clock-cells = <1>; + }; + + reset: reset { + compatible = "raspberrypi,firmware-reset"; + #reset-cells = <1>; + }; + + vcio: vcio { + compatible = "raspberrypi,vcio"; + }; + }; + + power: power { + compatible = "raspberrypi,bcm2835-power"; + firmware = <&firmware>; + #power-domain-cells = <1>; + }; + + fb: fb { + compatible = "brcm,bcm2708-fb"; + firmware = <&firmware>; + status = "okay"; + }; + + rpi_rtc: rpi_rtc { + compatible = "raspberrypi,rpi-rtc"; + firmware = <&firmware>; + status = "okay"; + trickle-charge-microvolt = <0>; + }; + + nvmem { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + nvmem_otp: nvmem_otp { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <0 192>; + status = "okay"; + }; + + nvmem_cust: nvmem_cust { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <1 8>; + status = "okay"; + }; + + nvmem_mac: nvmem_mac { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <2 6>; + status = "okay"; + }; + + nvmem_priv: nvmem_priv { + compatible = "raspberrypi,rpi-otp"; + firmware = <&firmware>; + reg = <3 16>; + status = "okay"; + }; + }; + + /* Define these notional regulators for use by overlays, etc. */ + vdd_3v3_reg: fixedregulator_3v3 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3v3"; + }; + + vdd_5v0_reg: fixedregulator_5v0 { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "5v0"; + }; +}; + +/ { + __overrides__ { + arm_freq; + axiperf = <&axiperf>,"status"; + + nvmem_cust_rw = <&nvmem_cust>,"rw?"; + nvmem_priv_rw = <&nvmem_priv>,"rw?"; + nvmem_mac_rw = <&nvmem_mac>,"rw?"; + strict_gpiod = <&chosen>, "bootargs=pinctrl_rp1.persist_gpio_outputs=n"; + + cam0_reg = <&cam0_reg>,"status"; + cam0_reg_gpio = <&cam0_reg>,"gpio:4", + <&cam0_reg>,"gpio:0=", <&gpio>; + cam1_reg = <&cam1_reg>,"status"; + cam1_reg_gpio = <&cam1_reg>,"gpio:4", + <&cam1_reg>,"gpio:0=", <&gpio>; + + }; +}; + +pciex1: &pcie1 { }; +pciex4: &pcie2 { }; + +&dma32 { + /* The VPU firmware uses DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x03f>; +}; + +&dma40 { + /* The VPU firmware DMA channel 11 for VCHIQ */ + brcm,dma-channel-mask = <0x07c0>; +}; + +&hdmi0 { + dmas = <&dma40 (10|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; + +&hdmi1 { + dmas = <&dma40 (17|(1<<30)|(1<<24)|(10<<16)|(15<<20))>; +}; + +&spi10 { + dmas = <&dma40 6>, <&dma40 7>; + dma-names = "tx", "rx"; +}; + +&usb { + power-domains = <&power RPI_POWER_DOMAIN_USB>; +}; + +&rmem { + /* + * RPi5's co-processor will copy the board's bootloader configuration + * into memory for the OS to consume. It'll also update this node with + * its placement information. + */ + blconfig: nvram@0 { + compatible = "raspberrypi,bootloader-config", "nvmem-rmem"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x0>; + no-map; + status = "disabled"; + }; + /* + * RPi5 will copy the binary public key blob (if present) from the bootloader + * into memory for use by the OS. + */ + blpubkey: nvram@1 { + compatible = "raspberrypi,bootloader-public-key", "nvmem-rmem"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x0 0x0 0x0>; + no-map; + status = "disabled"; + }; +}; + +&rp1_adc { + status = "okay"; +}; + +/* Add some gpiomem nodes to make the devices accessible to userspace. + * /dev/gpiomem should expose the registers for the interface with DT alias + * gpio. + */ + +&rp1 { + gpiomem@d0000 { + /* Export IO_BANKs, RIO_BANKs and PADS_BANKs to userspace */ + compatible = "raspberrypi,gpiomem"; + reg = <0xc0 0x400d0000 0x0 0x30000>; + chardev-name = "gpiomem0"; + }; +}; + +&soc { + gpiomem@7d508500 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d508500 0x40>; + chardev-name = "gpiomem1"; + }; + + gpiomem@7d517c00 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d517c00 0x40>; + chardev-name = "gpiomem2"; + }; + + gpiomem@7d504100 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d504100 0x20>; + chardev-name = "gpiomem3"; + }; + + gpiomem@7d510700 { + compatible = "raspberrypi,gpiomem"; + reg = <0x7d510700 0x20>; + chardev-name = "gpiomem4"; + }; + + sound: sound { + status = "disabled"; + }; +}; + +i2c0: &rp1_i2c0 { }; +i2c1: &rp1_i2c1 { }; +i2c2: &rp1_i2c2 { }; +i2c3: &rp1_i2c3 { }; +i2c4: &rp1_i2c4 { }; +i2c5: &rp1_i2c5 { }; +i2c6: &rp1_i2c6 { }; +i2s: &rp1_i2s0 { }; +i2s_clk_producer: &rp1_i2s0 { }; +i2s_clk_consumer: &rp1_i2s1 { }; +pwm0: &rp1_pwm0 { }; +pwm1: &rp1_pwm1 { }; +pwm: &pwm0 { }; +spi0: &rp1_spi0 { }; +spi1: &rp1_spi1 { }; +spi2: &rp1_spi2 { }; +spi3: &rp1_spi3 { }; +spi4: &rp1_spi4 { }; +spi5: &rp1_spi5 { }; + +uart0_pins: &rp1_uart0_14_15 {}; +uart0_ctsrts_pins: &rp1_uart0_ctsrts_16_17 {}; +uart0: &rp1_uart0 { + pinctrl-0 = <&uart0_pins>; +}; + +uart1_pins: &rp1_uart1_0_1 {}; +uart1_ctsrts_pins: &rp1_uart1_ctsrts_2_3 {}; +uart1: &rp1_uart1 { }; + +uart2_pins: &rp1_uart2_4_5 {}; +uart2_ctsrts_pins: &rp1_uart2_ctsrts_6_7 {}; +uart2: &rp1_uart2 { }; + +uart3_pins: &rp1_uart3_8_9 {}; +uart3_ctsrts_pins: &rp1_uart3_ctsrts_10_11 {}; +uart3: &rp1_uart3 { }; + +uart4_pins: &rp1_uart4_12_13 {}; +uart4_ctsrts_pins: &rp1_uart4_ctsrts_14_15 {}; +uart4: &rp1_uart4 { }; + +i2c0_pins: &rp1_i2c0_0_1 {}; +i2c_vc: &i2c0 { // This is pins 27,28 on the header (not MIPI) + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; +}; + +i2c1_pins: &rp1_i2c1_2_3 {}; +i2c_arm: &i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <100000>; +}; + +i2c2_pins: &rp1_i2c2_4_5 {}; +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +i2c3_pins: &rp1_i2c3_6_7 {}; +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; +}; + +&i2s_clk_producer { + pinctrl-names = "default"; + pinctrl-0 = <&rp1_i2s0_18_21>; +}; + +&i2s_clk_consumer { + pinctrl-names = "default"; + pinctrl-0 = <&rp1_i2s1_18_21>; +}; + +spi0_pins: &rp1_spi0_gpio9 {}; +spi0_cs_pins: &rp1_spi0_cs_gpio7 {}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pins &spi0_cs_pins>; + cs-gpios = <&gpio 8 1>, <&gpio 7 1>; + + spidev0: spidev@0 { + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; + + spidev1: spidev@1 { + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <125000000>; + }; +}; + +spi2_pins: &rp1_spi2_gpio1 {}; +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins>; +}; + +spi3_pins: &rp1_spi3_gpio5 {}; +&spi3 { + pinctrl-names = "default"; + pinctrl-0 = <&spi3_pins>; +}; + +spi4_pins: &rp1_spi4_gpio9 {}; +&spi4 { + pinctrl-names = "default"; + pinctrl-0 = <&spi4_pins>; +}; + +spi5_pins: &rp1_spi5_gpio13 {}; +&spi5 { + pinctrl-names = "default"; + pinctrl-0 = <&spi5_pins>; +}; --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi @@ -0,0 +1,1302 @@ +// SPDX-License-Identifier: GPL-2.0 +#include +#include +#include + +/ { + compatible = "brcm,bcm2712", "brcm,bcm2711"; + model = "BCM2712"; + + #address-cells = <2>; + #size-cells = <1>; + + interrupt-parent = <&gicv2>; + + rmem: reserved-memory { + #address-cells = <2>; + #size-cells = <1>; + ranges; + + atf@0 { + reg = <0x0 0x0 0x80000>; + no-map; + }; + + cma: linux,cma { + compatible = "shared-dma-pool"; + size = <0x4000000>; /* 64MB */ + reusable; + linux,cma-default; + + /* + * arm64 reserves the CMA by default somewhere in + * ZONE_DMA32, that's not good enough for the BCM2711 + * as some devices can only address the lower 1G of + * memory (ZONE_DMA). + */ + alloc-ranges = <0x0 0x00000000 0x40000000>; + }; + }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <2000>; + polling-delay = <1000>; + coefficients = <(-550) 450000>; + thermal-sensors = <&thermal>; + + thermal_trips: trips { + cpu_crit: cpu-crit { + temperature = <110000>; + hysteresis = <0>; + type = "critical"; + }; + }; + + cooling_maps: cooling-maps { + }; + }; + }; + + clk_27MHz: clk-27M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <27000000>; + clock-output-names = "27MHz-clock"; + }; + + clk_108MHz: clk-108M { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <108000000>; + clock-output-names = "108MHz-clock"; + }; + + hvs: hvs@107c580000 { + compatible = "brcm,bcm2712-hvs"; + reg = <0x10 0x7c580000 0x1a000>; + interrupt-parent = <&disp_intr>; + interrupts = <2>, <9>, <16>; + interrupt-names = "ch0-eof", "ch1-eof", "ch2-eof"; + //iommus = <&iommu4>; + status = "disabled"; + }; + + soc: soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x7c000000 0x10 0x7c000000 0x04000000>; + /* Emulate a contiguous 30-bit address range for DMA */ + dma-ranges = <0xc0000000 0x00 0x00000000 0x40000000>, + <0x7c000000 0x10 0x7c000000 0x04000000>; + + system_timer: timer@7c003000 { + compatible = "brcm,bcm2835-system-timer"; + reg = <0x7c003000 0x1000>; + interrupts = , + , + , + ; + clock-frequency = <1000000>; + }; + + firmwarekms: firmwarekms@7d503000 { + compatible = "raspberrypi,rpi-firmware-kms-2712"; + /* SUN_L2 interrupt reg */ + reg = <0x7d503000 0x18>; + interrupt-parent = <&cpu_l2_irq>; + interrupts = <19>; + brcm,firmware = <&firmware>; + status = "disabled"; + }; + + axiperf: axiperf { + compatible = "brcm,bcm2712-axiperf"; + reg = <0x7c012800 0x100>, + <0x7e000000 0x100>; + firmware = <&firmware>; + status = "disabled"; + }; + + mailbox: mailbox@7c013880 { + compatible = "brcm,bcm2835-mbox"; + reg = <0x7c013880 0x40>; + interrupts = ; + #mbox-cells = <0>; + }; + + pixelvalve0: pixelvalve@7c410000 { + compatible = "brcm,bcm2712-pixelvalve0"; + reg = <0x7c410000 0x100>; + interrupts = ; + status = "disabled"; + }; + + pixelvalve1: pixelvalve@7c411000 { + compatible = "brcm,bcm2712-pixelvalve1"; + reg = <0x7c411000 0x100>; + interrupts = ; + status = "disabled"; + }; + + mop: mop@7c500000 { + compatible = "brcm,bcm2712-mop"; + reg = <0x7c500000 0x28>; + interrupt-parent = <&disp_intr>; + interrupts = <1>; + status = "disabled"; + }; + + moplet: moplet@7c501000 { + compatible = "brcm,bcm2712-moplet"; + reg = <0x7c501000 0x20>; + interrupt-parent = <&disp_intr>; + interrupts = <0>; + status = "disabled"; + }; + + disp_intr: interrupt-controller@7c502000 { + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; + reg = <0x7c502000 0x30>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + status = "disabled"; + }; + + dvp: clock@7c700000 { + compatible = "brcm,brcm2711-dvp"; + reg = <0x7c700000 0x10>; + clocks = <&clk_108MHz>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + /* + * This node is the provider for the enable-method for + * bringing up secondary cores. + */ + local_intc: local_intc@7cd00000 { + compatible = "brcm,bcm2836-l1-intc"; + reg = <0x7cd00000 0x100>; + }; + + uart0: serial@7d001000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7d001000 0x200>; + interrupts = ; + clocks = <&clk_uart>, + <&clk_vpu>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart2: serial@7d001400 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7d001400 0x200>; + interrupts = ; + clocks = <&clk_uart>, + <&clk_vpu>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + uart5: serial@7d001a00 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x7d001a00 0x200>; + interrupts = ; + clocks = <&clk_uart>, + <&clk_vpu>; + clock-names = "uartclk", "apb_pclk"; + arm,primecell-periphid = <0x00241011>; + status = "disabled"; + }; + + sdhost: mmc@7d002000 { + compatible = "brcm,bcm2835-sdhost"; + reg = <0x7d002000 0x100>; + //interrupts = ; + clocks = <&clk_vpu>; + status = "disabled"; + }; + + i2s: i2s@7d003000 { + compatible = "brcm,bcm2835-i2s"; + reg = <0x7d003000 0x24>; + //clocks = <&cprman BCM2835_CLOCK_PCM>; + status = "disabled"; + }; + + spi0: spi@7d004000 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004000 0x200>; + interrupts = ; + clocks = <&clk_vpu>; + num-cs = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi3: spi@7d004600 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004600 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi4: spi@7d004800 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004800 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi5: spi@7d004a00 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004a00 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + spi6: spi@7d004c00 { + compatible = "brcm,bcm2835-spi"; + reg = <0x7d004c00 0x0200>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c0: i2c@7d005000 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005000 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c@7d005600 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005600 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c4: i2c@7d005800 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005800 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c5: i2c@7d005a00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005a00 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c6: i2c@7d005c00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005c00 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c8: i2c@7d005e00 { + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c"; + reg = <0x7d005e00 0x20>; + interrupts = ; + clocks = <&clk_vpu>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm0: pwm@7d00c000 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7d00c000 0x28>; + assigned-clock-rates = <50000000>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pwm1: pwm@7d00c800 { + compatible = "brcm,bcm2835-pwm"; + reg = <0x7d00c800 0x28>; + assigned-clock-rates = <50000000>; + #pwm-cells = <3>; + status = "disabled"; + }; + + pm: watchdog@7d200000 { + compatible = "brcm,bcm2712-pm"; + reg = <0x7d200000 0x308>; + reg-names = "pm"; + #power-domain-cells = <1>; + #reset-cells = <1>; + //clocks = <&cprman BCM2835_CLOCK_V3D>, + // <&cprman BCM2835_CLOCK_PERI_IMAGE>, + // <&cprman BCM2835_CLOCK_H264>, + // <&cprman BCM2835_CLOCK_ISP>; + clock-names = "v3d", "peri_image", "h264", "isp"; + system-power-controller; + }; + + cprman: cprman@7d202000 { + compatible = "brcm,bcm2711-cprman"; + reg = <0x7d202000 0x2000>; + #clock-cells = <1>; + + /* CPRMAN derives almost everything from the + * platform's oscillator. However, the DSI + * pixel clocks come from the DSI analog PHY. + */ + clocks = <&clk_osc>; + status = "disabled"; + }; + + random: rng@7d208000 { + compatible = "brcm,bcm2711-rng200"; + reg = <0x7d208000 0x28>; + status = "okay"; + }; + + cpu_l2_irq: intc@7d503000 { + compatible = "brcm,l2-intc"; + reg = <0x7d503000 0x18>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + pinctrl: pinctrl@7d504100 { + compatible = "brcm,bcm2712-pinctrl"; + reg = <0x7d504100 0x30>; + + uarta_24_pins: uarta_24_pins { + pin_rts { + function = "uart0"; + pins = "gpio24"; + bias-disable; + }; + pin_cts { + function = "uart0"; + pins = "gpio25"; + bias-pull-up; + }; + pin_txd { + function = "uart0"; + pins = "gpio26"; + bias-disable; + }; + pin_rxd { + function = "uart0"; + pins = "gpio27"; + bias-pull-up; + }; + }; + + sdio2_30_pins: sdio2_30_pins { + pin_clk { + function = "sd2"; + pins = "gpio30"; + bias-disable; + }; + pin_cmd { + function = "sd2"; + pins = "gpio31"; + bias-pull-up; + }; + pins_dat { + function = "sd2"; + pins = "gpio32", "gpio33", "gpio34", "gpio35"; + bias-pull-up; + }; + }; + }; + + ddc0: i2c@7d508200 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d508200 0x58>; + interrupt-parent = <&bsc_irq>; + interrupts = <1>; + clock-frequency = <97500>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + ddc1: i2c@7d508280 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d508280 0x58>; + interrupt-parent = <&bsc_irq>; + interrupts = <2>; + clock-frequency = <97500>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + bscd: i2c@7d508300 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d508300 0x58>; + interrupt-parent = <&bsc_irq>; + interrupts = <0>; + clock-frequency = <200000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + bsc_irq: intc@7d508380 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d508380 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + main_irq: intc@7d508400 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d508400 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gio: gpio@7d508500 { + compatible = "brcm,brcmstb-gpio"; + reg = <0x7d508500 0x40>; + interrupt-parent = <&main_irq>; + interrupts = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + brcm,gpio-bank-widths = <32 22>; + brcm,gpio-direct; + }; + + uarta: serial@7d50c000 { + compatible = "brcm,bcm7271-uart"; + reg = <0x7d50c000 0x20>; + reg-names = "uart"; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + skip-init; + status = "disabled"; + }; + + uartb: serial@7d50d000 { + compatible = "brcm,bcm7271-uart"; + reg = <0x7d50d000 0x20>; + reg-names = "uart"; + reg-shift = <2>; + reg-io-width = <4>; + interrupts = ; + skip-init; + status = "disabled"; + }; + + aon_intr: interrupt-controller@7d510600 { + compatible = "brcm,bcm2711-l2-intc", "brcm,l2-intc"; + reg = <0x7d510600 0x30>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + status = "disabled"; + }; + + pinctrl_aon: pinctrl@7d510700 { + compatible = "brcm,bcm2712-aon-pinctrl"; + reg = <0x7d510700 0x20>; + + i2c3_m4_agpio0_pins: i2c3_m4_agpio0_pins { + function = "vc_i2c3"; + pins = "aon_gpio0", "aon_gpio1"; + bias-pull-up; + }; + + bsc_m1_agpio13_pins: bsc_m1_agpio13_pins { + function = "bsc_m1"; + pins = "aon_gpio13", "aon_gpio14"; + bias-pull-up; + }; + + bsc_pmu_sgpio4_pins: bsc_pmu_sgpio4_pins { + function = "avs_pmu_bsc"; + pins = "aon_sgpio4", "aon_sgpio5"; + }; + + bsc_m2_sgpio4_pins: bsc_m2_sgpio4_pins { + function = "bsc_m2"; + pins = "aon_sgpio4", "aon_sgpio5"; + }; + + pwm_aon_agpio1_pins: pwm_aon_agpio1_pins { + function = "aon_pwm"; + pins = "aon_gpio1", "aon_gpio2"; + }; + + pwm_aon_agpio4_pins: pwm_aon_agpio4_pins { + function = "vc_pwm0"; + pins = "aon_gpio4", "aon_gpio5"; + }; + + pwm_aon_agpio7_pins: pwm_aon_agpio7_pins { + function = "aon_pwm"; + pins = "aon_gpio7", "aon_gpio9"; + }; + }; + + intc@7d517000 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d517000 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + status = "disabled"; + }; + + bscc: i2c@7d517a00 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d517a00 0x58>; + interrupt-parent = <&bsc_aon_irq>; + interrupts = <0>; + clock-frequency = <200000>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pwm_aon: pwm@7d517a80 { + compatible = "brcm,bcm7038-pwm"; + reg = <0x7d517a80 0x28>; + #pwm-cells = <3>; + clocks = <&clk_27MHz>; + }; + + main_aon_irq: intc@7d517ac0 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d517ac0 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + bsc_aon_irq: intc@7d517b00 { + compatible = "brcm,bcm7271-l2-intc"; + reg = <0x7d517b00 0x10>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + gio_aon: gpio@7d517c00 { + compatible = "brcm,brcmstb-gpio"; + reg = <0x7d517c00 0x40>; + interrupt-parent = <&main_aon_irq>; + interrupts = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + brcm,gpio-bank-widths = <17 6>; + brcm,gpio-direct; + }; + + avs_monitor: avs-monitor@7d542000 { + compatible = "brcm,bcm2711-avs-monitor", + "syscon", "simple-mfd"; + reg = <0x7d542000 0xf00>; + status = "okay"; + + thermal: thermal { + compatible = "brcm,bcm2711-thermal"; + #thermal-sensor-cells = <0>; + }; + }; + + bsc_pmu: i2c@7d544000 { + compatible = "brcm,brcmstb-i2c"; + reg = <0x7d544000 0x58>; + interrupt-parent = <&bsc_aon_irq>; + interrupts = <1>; + clock-frequency = <200000>; + status = "disabled"; + }; + + hdmi0: hdmi@7ef00700 { + compatible = "brcm,bcm2712-hdmi0"; + reg = <0x7c701400 0x300>, + <0x7c701000 0x200>, + <0x7c701d00 0x300>, + <0x7c702000 0x80>, + <0x7c703800 0x200>, + <0x7c704000 0x800>, + <0x7c700100 0x80>, + <0x7d510800 0x100>, + <0x7c720000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + resets = <&dvp 1>; + interrupt-parent = <&aon_intr>; + interrupts = <1>, <2>, <3>, + <7>, <8>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", + "hpd-connected", "hpd-removed"; + ddc = <&ddc0>; + dmas = <&dma32 10>; + dma-names = "audio-rx"; + status = "disabled"; + }; + + hdmi1: hdmi@7ef05700 { + compatible = "brcm,bcm2712-hdmi1"; + reg = <0x7c706400 0x300>, + <0x7c706000 0x200>, + <0x7c706d00 0x300>, + <0x7c707000 0x80>, + <0x7c708800 0x200>, + <0x7c709000 0x800>, + <0x7c700180 0x80>, + <0x7d511000 0x100>, + <0x7c720000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + ddc = <&ddc1>; + resets = <&dvp 2>; + interrupt-parent = <&aon_intr>; + interrupts = <11>, <12>, <13>, + <14>, <15>; + interrupt-names = "cec-tx", "cec-rx", "cec-low", + "hpd-connected", "hpd-removed"; + dmas = <&dma32 17>; + dma-names = "audio-rx"; + status = "disabled"; + }; + }; + + arm-pmu { + compatible = "arm,cortex-a76-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + /* This only applies to the ARMv7 stub */ + arm,cpu-registers-not-fw-configured; + }; + + cpus: cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit + + /* Source for d/i cache-line-size, cache-sets, cache-size + * https://developer.arm.com/documentation/100798/0401 + * /L1-memory-system/About-the-L1-memory-system?lang=en + */ + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x000>; + enable-method = "psci"; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + next-level-cache = <&l2_cache_l0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x100>; + enable-method = "psci"; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + next-level-cache = <&l2_cache_l1>; + }; + + cpu2: cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x200>; + enable-method = "psci"; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + next-level-cache = <&l2_cache_l2>; + }; + + cpu3: cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a76"; + reg = <0x300>; + enable-method = "psci"; + d-cache-size = <0x10000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + i-cache-size = <0x10000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; // 64KiB(size)/64(line-size)=1024ways/4-way set + next-level-cache = <&l2_cache_l3>; + }; + + /* Source for cache-line-size and cache-sets: + * https://developer.arm.com/documentation/100798/0401 + * /L2-memory-system/About-the-L2-memory-system?lang=en + * and for cache-size: + * https://www.raspberrypi.com/documentation/computers + * /processors.html#bcm2712 + */ + l2_cache_l0: l2-cache-l0 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <128>; + cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set + cache-level = <2>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + l2_cache_l1: l2-cache-l1 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <128>; + cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set + cache-level = <2>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + l2_cache_l2: l2-cache-l2 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <128>; + cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set + cache-level = <2>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + l2_cache_l3: l2-cache-l3 { + compatible = "cache"; + cache-size = <0x80000>; + cache-line-size = <128>; + cache-sets = <1024>; // 512KiB(size)/64(line-size)=8192ways/8-way set + cache-level = <2>; + cache-unified; + next-level-cache = <&l3_cache>; + }; + + /* Source for cache-line-size and cache-sets: + * https://developer.arm.com/documentation/100453/0401/L3-cache?lang=en + * Source for cache-size: + * https://www.raspberrypi.com/documentation/computers/processors.html#bcm2712 + */ + l3_cache: l3-cache { + compatible = "cache"; + cache-size = <0x200000>; + cache-line-size = <64>; + cache-sets = <2048>; // 2MiB(size)/64(line-size)=32768ways/16-way set + cache-level = <3>; + }; + }; + + psci { + method = "smc"; + compatible = "arm,psci-1.0", "arm,psci-0.2", "arm,psci"; + cpu_on = <0xc4000003>; + cpu_suspend = <0xc4000001>; + cpu_off = <0x84000002>; + }; + + axi: axi { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>, + <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>, + <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>, + <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>, + <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>; + + dma-ranges = <0x00 0x00000000 0x00 0x00000000 0x10 0x00000000>, + <0x10 0x00000000 0x10 0x00000000 0x01 0x00000000>, + <0x14 0x00000000 0x14 0x00000000 0x04 0x00000000>, + <0x18 0x00000000 0x18 0x00000000 0x04 0x00000000>, + <0x1c 0x00000000 0x1c 0x00000000 0x04 0x00000000>; + + vc4: gpu { + compatible = "brcm,bcm2712-vc6"; + }; + + iommu2: iommu@5100 { + /* IOMMU2 for PISP-BE, HEVC; and (unused) H264 accelerators */ + compatible = "brcm,bcm2712-iommu"; + reg = <0x10 0x5100 0x0 0x80>; + cache = <&iommuc>; + #iommu-cells = <0>; + }; + + iommu4: iommu@5200 { + /* IOMMU4 for HVS, MPL/TXP; and (unused) Unicam, PISP-FE, MiniBVN */ + compatible = "brcm,bcm2712-iommu"; + reg = <0x10 0x5200 0x0 0x80>; + cache = <&iommuc>; + #iommu-cells = <0>; + #interconnect-cells = <0>; + }; + + iommu5: iommu@5280 { + /* IOMMU5 for PCIe2 (RP1); and (unused) BSTM */ + compatible = "brcm,bcm2712-iommu"; + reg = <0x10 0x5280 0x0 0x80>; + cache = <&iommuc>; + #iommu-cells = <0>; + dma-iova-offset = <0x10 0x00000000>; // HACK for RP1 masters over PCIe + }; + + iommuc: iommuc@5b00 { + compatible = "brcm,bcm2712-iommuc"; + reg = <0x10 0x5b00 0x0 0x80>; + }; + + dma32: dma@10000 { + compatible = "brcm,bcm2712-dma"; + reg = <0x10 0x00010000 0 0x600>; + interrupts = , + , + , + , + , + ; + interrupt-names = "dma0", + "dma1", + "dma2", + "dma3", + "dma4", + "dma5"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x0035>; + }; + + dma40: dma@10600 { + compatible = "brcm,bcm2712-dma"; + reg = <0x10 0x00010600 0 0x600>; + interrupts = + , /* dma4 6 */ + , /* dma4 7 */ + , /* dma4 8 */ + , /* dma4 9 */ + , /* dma4 10 */ + ; /* dma4 11 */ + interrupt-names = "dma6", + "dma7", + "dma8", + "dma9", + "dma10", + "dma11"; + #dma-cells = <1>; + brcm,dma-channel-mask = <0x0fc0>; + }; + + // Single-lane Gen3 PCIe + // Outbound window at 0x14_000000-0x17_ffffff + pcie0: pcie@100000 { + compatible = "brcm,bcm2712-pcie"; + reg = <0x10 0x00100000 0x0 0x9310>; + device_type = "pci"; + max-link-speed = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + /* + * Unused interrupts: + * 208: AER + * 215: NMI + * 216: PME + */ + interrupt-parent = <&gicv2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 209 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gicv2 GIC_SPI 210 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gicv2 GIC_SPI 211 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gicv2 GIC_SPI 212 + IRQ_TYPE_LEVEL_HIGH>; + resets = <&bcm_reset 5>, <&bcm_reset 42>, <&pcie_rescal>; + reset-names = "swinit", "bridge", "rescal"; + msi-controller; + msi-parent = <&pcie0>; + + ranges = <0x02000000 0x00 0x00000000 + 0x17 0x00000000 + 0x0 0xfffffffc>, + <0x43000000 0x04 0x00000000 + 0x14 0x00000000 + 0x3 0x00000000>; + + dma-ranges = <0x43000000 0x10 0x00000000 + 0x00 0x00000000 + 0x10 0x00000000>; + + status = "disabled"; + }; + + // Single-lane Gen3 PCIe + // Outbound window at 0x18_000000-0x1b_ffffff + pcie1: pcie@110000 { + compatible = "brcm,bcm2712-pcie"; + reg = <0x10 0x00110000 0x0 0x9310>; + device_type = "pci"; + max-link-speed = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + /* + * Unused interrupts: + * 218: AER + * 225: NMI + * 226: PME + */ + interrupt-parent = <&gicv2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 219 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gicv2 GIC_SPI 220 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gicv2 GIC_SPI 221 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gicv2 GIC_SPI 222 + IRQ_TYPE_LEVEL_HIGH>; + resets = <&bcm_reset 7>, <&bcm_reset 43>, <&pcie_rescal>; + reset-names = "swinit", "bridge", "rescal"; + msi-controller; + msi-parent = <&mip1>; + + ranges = <0x02000000 0x00 0x00000000 + 0x1b 0x00000000 + 0x00 0xfffffffc>, + <0x43000000 0x04 0x00000000 + 0x18 0x00000000 + 0x03 0x00000000>; + + dma-ranges = <0x03000000 0x10 0x00000000 + 0x00 0x00000000 + 0x10 0x00000000>; + + status = "disabled"; + }; + + pcie_rescal: reset-controller@119500 { + compatible = "brcm,bcm7216-pcie-sata-rescal"; + reg = <0x10 0x00119500 0x0 0x10>; + #reset-cells = <0>; + }; + + // Quad-lane Gen3 PCIe + // Outbound window at 0x1c_000000-0x1f_ffffff + pcie2: pcie@120000 { + compatible = "brcm,bcm2712-pcie"; + reg = <0x10 0x00120000 0x0 0x9310>; + device_type = "pci"; + max-link-speed = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + #size-cells = <2>; + /* + * Unused interrupts: + * 228: AER + * 235: NMI + * 236: PME + */ + interrupt-parent = <&gicv2>; + interrupts = , + ; + interrupt-names = "pcie", "msi"; + interrupt-map-mask = <0x0 0x0 0x0 0x7>; + interrupt-map = <0 0 0 1 &gicv2 GIC_SPI 229 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gicv2 GIC_SPI 230 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gicv2 GIC_SPI 231 + IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gicv2 GIC_SPI 232 + IRQ_TYPE_LEVEL_HIGH>; + resets = <&bcm_reset 32>, <&bcm_reset 44>, <&pcie_rescal>; + reset-names = "swinit", "bridge", "rescal"; + msi-controller; + msi-parent = <&mip0>; + + // ~4GB, 32-bit, not-prefetchable at PCIe 00_00000000 + ranges = <0x02000000 0x00 0x00000000 + 0x1f 0x00000000 + 0x0 0xfffffffc>, + // 12GB, 64-bit, prefetchable at PCIe 04_00000000 + <0x43000000 0x04 0x00000000 + 0x1c 0x00000000 + 0x03 0x00000000>; + + // 64GB system RAM space at PCIe 10_00000000 + dma-ranges = <0x02000000 0x00 0x00000000 + 0x1f 0x00000000 + 0x00 0x00400000>, + <0x43000000 0x10 0x00000000 + 0x00 0x00000000 + 0x10 0x00000000>; + + status = "disabled"; + }; + + mip0: msi-controller@130000 { + compatible = "brcm,bcm2712-mip-intc"; + reg = <0x10 0x00130000 0x0 0xc0>; + msi-controller; + interrupt-controller; + #interrupt-cells = <2>; + brcm,msi-base-spi = <128>; + brcm,msi-num-spis = <64>; + brcm,msi-offset = <0>; + brcm,msi-pci-addr = <0xff 0xfffff000>; + }; + + mip1: msi-controller@131000 { + compatible = "brcm,bcm2712-mip-intc"; + reg = <0x10 0x00131000 0x0 0xc0>; + msi-controller; + interrupt-controller; + #interrupt-cells = <2>; + brcm,msi-base-spi = <247>; + /* Actually 20 total, but the others are + * both sparse and non-consecutive */ + brcm,msi-num-spis = <8>; + brcm,msi-offset = <8>; + brcm,msi-pci-addr = <0xff 0xffffe000>; + }; + + syscon_piarbctl: syscon@400018 { + compatible = "brcm,syscon-piarbctl", "syscon", "simple-mfd"; + reg = <0x10 0x00400018 0x0 0x18>; + }; + + usb: usb@480000 { + compatible = "brcm,bcm2835-usb"; + reg = <0x10 0x00480000 0x0 0x10000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&clk_usb>; + clock-names = "otg"; + phys = <&usbphy>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + rpivid: codec@800000 { + compatible = "raspberrypi,rpivid-vid-decoder"; + reg = <0x10 0x00800000 0x0 0x10000>, /* HEVC */ + <0x10 0x00840000 0x0 0x1000>; /* INTC */ + reg-names = "hevc", + "intc"; + + interrupts = ; + + clocks = <&firmware_clocks 11>; + clock-names = "hevc"; + iommus = <&iommu2>; + status = "disabled"; + }; + + sdio1: mmc@fff000 { + compatible = "brcm,bcm2712-sdhci"; + reg = <0x10 0x00fff000 0x0 0x260>, + <0x10 0x00fff400 0x0 0x200>, + <0x10 0x015040b0 0x0 0x4>, // Bus isolation control + <0x10 0x015200f0 0x0 0x24>; // LCPLL control misc0-8 + reg-names = "host", "cfg", "busisol", "lcpll"; + interrupts = ; + clocks = <&clk_emmc2>; + sdhci-caps-mask = <0x0000C000 0x0>; + sdhci-caps = <0x0 0x0>; + mmc-ddr-3_3v; + }; + + sdio2: mmc@1100000 { + compatible = "brcm,bcm2712-sdhci"; + reg = <0x10 0x01100000 0x0 0x260>, + <0x10 0x01100400 0x0 0x200>; + reg-names = "host", "cfg"; + interrupts = ; + clocks = <&clk_emmc2>; + sdhci-caps-mask = <0x0000C000 0x0>; + sdhci-caps = <0x0 0x0>; + supports-cqe; + mmc-ddr-3_3v; + status = "disabled"; + }; + + bcm_reset: reset-controller@1504318 { + compatible = "brcm,brcmstb-reset"; + reg = <0x10 0x01504318 0x0 0x30>; + #reset-cells = <1>; + }; + + v3d: v3d@2000000 { + compatible = "brcm,2712-v3d"; + reg = <0x10 0x02000000 0x0 0x4000>, + <0x10 0x02008000 0x0 0x6000>; + reg-names = "hub", "core0"; + + power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>; + resets = <&pm BCM2835_RESET_V3D>; + clocks = <&firmware_clocks 5>; + clocks-names = "v3d"; + interrupts = , + ; + status = "disabled"; + }; + + gicv2: interrupt-controller@7fff9000 { + interrupt-controller; + #interrupt-cells = <3>; + compatible = "arm,gic-400"; + reg = <0x10 0x7fff9000 0x0 0x1000>, + <0x10 0x7fffa000 0x0 0x2000>, + <0x10 0x7fffc000 0x0 0x2000>, + <0x10 0x7fffe000 0x0 0x2000>; + interrupts = ; + }; + + pisp_be: pisp_be@880000 { + compatible = "raspberrypi,pispbe"; + reg = <0x10 0x00880000 0x0 0x4000>; + interrupts = ; + clocks = <&firmware_clocks 7>; + clocks-names = "isp_be"; + status = "okay"; + iommus = <&iommu2>; + }; + }; + + clocks { + /* The oscillator is the root of the clock tree. */ + clk_osc: clk-osc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "osc"; + clock-frequency = <54000000>; + }; + + clk_usb: clk-usb { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "otg"; + clock-frequency = <480000000>; + }; + + clk_vpu: clk_vpu { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <750000000>; + clock-output-names = "vpu-clock"; + }; + + clk_uart: clk_uart { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <9216000>; + clock-output-names = "uart-clock"; + }; + + clk_emmc2: clk_emmc2 { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <200000000>; + clock-output-names = "emmc2-clock"; + }; + }; + + usbphy: phy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + }; +}; --- /dev/null +++ b/arch/arm64/boot/dts/broadcom/rp1.dtsi @@ -0,0 +1,1287 @@ +#include +#include +#include + +&rp1_target { + rp1: rp1 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&rp1>; + + // ranges and dma-ranges must be provided by the includer + + rp1_clocks: clocks@18000 { + compatible = "raspberrypi,rp1-clocks"; + #clock-cells = <1>; + reg = <0xc0 0x40018000 0x0 0x10038>; + clocks = <&clk_xosc>; + + assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>, + <&rp1_clocks RP1_PLL_AUDIO_CORE>, + // RP1_PLL_VIDEO_CORE and dividers are now managed by VEC,DPI drivers + <&rp1_clocks RP1_PLL_SYS>, + <&rp1_clocks RP1_PLL_SYS_SEC>, + <&rp1_clocks RP1_PLL_AUDIO>, + <&rp1_clocks RP1_PLL_AUDIO_SEC>, + <&rp1_clocks RP1_CLK_SYS>, + <&rp1_clocks RP1_PLL_SYS_PRI_PH>, + // RP1_CLK_SLOW_SYS is used for the frequency counter (FC0) + <&rp1_clocks RP1_CLK_SLOW_SYS>, + <&rp1_clocks RP1_CLK_SDIO_TIMER>, + <&rp1_clocks RP1_CLK_SDIO_ALT_SRC>, + <&rp1_clocks RP1_CLK_ETH_TSU>; + + assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE + <1536000000>, // RP1_PLL_AUDIO_CORE + <200000000>, // RP1_PLL_SYS + <125000000>, // RP1_PLL_SYS_SEC + <61440000>, // RP1_PLL_AUDIO + <192000000>, // RP1_PLL_AUDIO_SEC + <200000000>, // RP1_CLK_SYS + <100000000>, // RP1_PLL_SYS_PRI_PH + // Must match the XOSC frequency + <50000000>, // RP1_CLK_SLOW_SYS + <1000000>, // RP1_CLK_SDIO_TIMER + <200000000>, // RP1_CLK_SDIO_ALT_SRC + <50000000>; // RP1_CLK_ETH_TSU + }; + + rp1_uart0: serial@30000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40030000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + dmas = <&rp1_dma RP1_DMA_UART0_TX>, + <&rp1_dma RP1_DMA_UART0_RX>; + dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart1: serial@34000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40034000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART1_TX>, + // <&rp1_dma RP1_DMA_UART1_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart2: serial@38000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40038000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART2_TX>, + // <&rp1_dma RP1_DMA_UART2_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart3: serial@3c000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x4003c000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART3_TX>, + // <&rp1_dma RP1_DMA_UART3_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart4: serial@40000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40040000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART4_TX>, + // <&rp1_dma RP1_DMA_UART4_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_uart5: serial@44000 { + compatible = "arm,pl011-axi"; + reg = <0xc0 0x40044000 0x0 0x100>; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_UART &rp1_clocks RP1_PLL_SYS_PRI_PH>; + clock-names = "uartclk", "apb_pclk"; + // dmas = <&rp1_dma RP1_DMA_UART5_TX>, + // <&rp1_dma RP1_DMA_UART5_RX>; + // dma-names = "tx", "rx"; + pinctrl-names = "default"; + arm,primecell-periphid = <0x00541011>; + uart-has-rtscts; + cts-event-workaround; + skip-init; + status = "disabled"; + }; + + rp1_spi8: spi@4c000 { + reg = <0xc0 0x4004c000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI8_TX>, + <&rp1_dma RP1_DMA_SPI8_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi0: spi@50000 { + reg = <0xc0 0x40050000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI0_TX>, + <&rp1_dma RP1_DMA_SPI0_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi1: spi@54000 { + reg = <0xc0 0x40054000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI1_TX>, + <&rp1_dma RP1_DMA_SPI1_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi2: spi@58000 { + reg = <0xc0 0x40058000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI2_TX>, + <&rp1_dma RP1_DMA_SPI2_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi3: spi@5c000 { + reg = <0xc0 0x4005c000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI3_TX>, + <&rp1_dma RP1_DMA_SPI3_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + // SPI4 is a target/slave interface + rp1_spi4: spi@60000 { + reg = <0xc0 0x40060000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <0>; + #size-cells = <0>; + num-cs = <1>; + spi-slave; + dmas = <&rp1_dma RP1_DMA_SPI4_TX>, + <&rp1_dma RP1_DMA_SPI4_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + + slave { + compatible = "spidev"; + spi-max-frequency = <1000000>; + }; + }; + + rp1_spi5: spi@64000 { + reg = <0xc0 0x40064000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI5_TX>, + <&rp1_dma RP1_DMA_SPI5_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_spi6: spi@68000 { + reg = <0xc0 0x40068000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <1>; + #size-cells = <0>; + num-cs = <2>; + dmas = <&rp1_dma RP1_DMA_SPI6_TX>, + <&rp1_dma RP1_DMA_SPI6_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + // SPI7 is a target/slave interface + rp1_spi7: spi@6c000 { + reg = <0xc0 0x4006c000 0x0 0x130>; + compatible = "snps,dw-apb-ssi"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + clock-names = "ssi_clk"; + #address-cells = <0>; + #size-cells = <0>; + num-cs = <1>; + spi-slave; + dmas = <&rp1_dma RP1_DMA_SPI7_TX>, + <&rp1_dma RP1_DMA_SPI7_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + + slave { + compatible = "spidev"; + spi-max-frequency = <1000000>; + }; + }; + + rp1_i2c0: i2c@70000 { + reg = <0xc0 0x40070000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_i2c1: i2c@74000 { + reg = <0xc0 0x40074000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_i2c2: i2c@78000 { + reg = <0xc0 0x40078000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_i2c3: i2c@7c000 { + reg = <0xc0 0x4007c000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_i2c4: i2c@80000 { + reg = <0xc0 0x40080000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_i2c5: i2c@84000 { + reg = <0xc0 0x40084000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_i2c6: i2c@88000 { + reg = <0xc0 0x40088000 0x0 0x1000>; + compatible = "snps,designware-i2c"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS>; + i2c-scl-rising-time-ns = <65>; + i2c-scl-falling-time-ns = <100>; + status = "disabled"; + }; + + rp1_pwm0: pwm@98000 { + compatible = "raspberrypi,rp1-pwm"; + reg = <0xc0 0x40098000 0x0 0x100>; + #pwm-cells = <3>; + clocks = <&rp1_clocks RP1_CLK_PWM0>; + assigned-clocks = <&rp1_clocks RP1_CLK_PWM0>; + assigned-clock-rates = <50000000>; + status = "disabled"; + }; + + rp1_pwm1: pwm@9c000 { + compatible = "raspberrypi,rp1-pwm"; + reg = <0xc0 0x4009c000 0x0 0x100>; + #pwm-cells = <3>; + clocks = <&rp1_clocks RP1_CLK_PWM1>; + assigned-clocks = <&rp1_clocks RP1_CLK_PWM1>; + assigned-clock-rates = <50000000>; + status = "disabled"; + }; + + rp1_i2s0: i2s@a0000 { + reg = <0xc0 0x400a0000 0x0 0x1000>; + compatible = "snps,designware-i2s"; + // Providing an interrupt disables DMA + // interrupts = ; + clocks = <&rp1_clocks RP1_CLK_I2S>; + clock-names = "i2sclk"; + #sound-dai-cells = <0>; + dmas = <&rp1_dma RP1_DMA_I2S0_TX>,<&rp1_dma RP1_DMA_I2S0_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_i2s1: i2s@a4000 { + reg = <0xc0 0x400a4000 0x0 0x1000>; + compatible = "snps,designware-i2s"; + // Providing an interrupt disables DMA + // interrupts = ; + clocks = <&rp1_clocks RP1_CLK_I2S>; + clock-names = "i2sclk"; + #sound-dai-cells = <0>; + dmas = <&rp1_dma RP1_DMA_I2S1_TX>,<&rp1_dma RP1_DMA_I2S1_RX>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + rp1_i2s2: i2s@a8000 { + reg = <0xc0 0x400a8000 0x0 0x1000>; + compatible = "snps,designware-i2s"; + // Providing an interrupt disables DMA + // interrupts = ; + clocks = <&rp1_clocks RP1_CLK_I2S>; + status = "disabled"; + }; + + rp1_sdio_clk0: sdio_clk0@b0004 { + compatible = "raspberrypi,rp1-sdio-clk"; + reg = <0xc0 0x400b0004 0x0 0x1c>; + clocks = <&sdio_src &sdhci_core>; + clock-names = "src", "base"; + #clock-cells = <0>; + status = "disabled"; + }; + + rp1_sdio_clk1: sdio_clk1@b4004 { + compatible = "raspberrypi,rp1-sdio-clk"; + reg = <0xc0 0x400b4004 0x0 0x1c>; + clocks = <&sdio_src &sdhci_core>; + clock-names = "src", "base"; + #clock-cells = <0>; + status = "disabled"; + }; + + rp1_adc: adc@c8000 { + compatible = "raspberrypi,rp1-adc"; + reg = <0xc0 0x400c8000 0x0 0x4000>; + clocks = <&rp1_clocks RP1_CLK_ADC>; + clock-names = "adcclk"; + #clock-cells = <0>; + vref-supply = <&rp1_vdd_3v3>; + status = "disabled"; + }; + + rp1_gpio: gpio@d0000 { + reg = <0xc0 0x400d0000 0x0 0xc000>, + <0xc0 0x400e0000 0x0 0xc000>, + <0xc0 0x400f0000 0x0 0xc000>; + compatible = "raspberrypi,rp1-gpio"; + interrupts = , + , + ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&rp1_gpio 0 0 54>; + + rp1_uart0_14_15: rp1_uart0_14_15 { + pin_txd { + function = "uart0"; + pins = "gpio14"; + bias-disable; + }; + pin_rxd { + function = "uart0"; + pins = "gpio15"; + bias-pull-up; + }; + }; + rp1_uart0_ctsrts_16_17: rp1_uart0_ctsrts_16_17 { + pin_cts { + function = "uart0"; + pins = "gpio16"; + bias-pull-up; + }; + pin_rts { + function = "uart0"; + pins = "gpio17"; + bias-disable; + }; + }; + rp1_uart1_0_1: rp1_uart1_0_1 { + pin_txd { + function = "uart1"; + pins = "gpio0"; + bias-disable; + }; + pin_rxd { + function = "uart1"; + pins = "gpio1"; + bias-pull-up; + }; + }; + rp1_uart1_ctsrts_2_3: rp1_uart1_ctsrts_2_3 { + pin_cts { + function = "uart1"; + pins = "gpio2"; + bias-pull-up; + }; + pin_rts { + function = "uart1"; + pins = "gpio3"; + bias-disable; + }; + }; + rp1_uart2_4_5: rp1_uart2_4_5 { + pin_txd { + function = "uart2"; + pins = "gpio4"; + bias-disable; + }; + pin_rxd { + function = "uart2"; + pins = "gpio5"; + bias-pull-up; + }; + }; + rp1_uart2_ctsrts_6_7: rp1_uart2_ctsrts_6_7 { + pin_cts { + function = "uart2"; + pins = "gpio6"; + bias-pull-up; + }; + pin_rts { + function = "uart2"; + pins = "gpio7"; + bias-disable; + }; + }; + rp1_uart3_8_9: rp1_uart3_8_9 { + pin_txd { + function = "uart3"; + pins = "gpio8"; + bias-disable; + }; + pin_rxd { + function = "uart3"; + pins = "gpio9"; + bias-pull-up; + }; + }; + rp1_uart3_ctsrts_10_11: rp1_uart3_ctsrts_10_11 { + pin_cts { + function = "uart3"; + pins = "gpio10"; + bias-pull-up; + }; + pin_rts { + function = "uart3"; + pins = "gpio11"; + bias-disable; + }; + }; + rp1_uart4_12_13: rp1_uart4_12_13 { + pin_txd { + function = "uart4"; + pins = "gpio12"; + bias-disable; + }; + pin_rxd { + function = "uart4"; + pins = "gpio13"; + bias-pull-up; + }; + }; + rp1_uart4_ctsrts_14_15: rp1_uart4_ctsrts_14_15 { + pin_cts { + function = "uart4"; + pins = "gpio14"; + bias-pull-up; + }; + pin_rts { + function = "uart4"; + pins = "gpio15"; + bias-disable; + }; + }; + + rp1_sdio0_22_27: rp1_sdio0_22_27 { + pin_clk { + function = "sd0"; + pins = "gpio22"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + pin_cmd { + function = "sd0"; + pins = "gpio23"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + pins_dat { + function = "sd0"; + pins = "gpio24", "gpio25", "gpio26", "gpio27"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + }; + + rp1_sdio1_28_33: rp1_sdio1_28_33 { + pin_clk { + function = "sd1"; + pins = "gpio28"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + pin_cmd { + function = "sd1"; + pins = "gpio29"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + pins_dat { + function = "sd1"; + pins = "gpio30", "gpio31", "gpio32", "gpio33"; + bias-pull-up; + drive-strength = <12>; + slew-rate = <1>; + }; + }; + + rp1_i2s0_18_21: rp1_i2s0_18_21 { + function = "i2s0"; + pins = "gpio18", "gpio19", "gpio20", "gpio21"; + bias-disable; + }; + + rp1_i2s1_18_21: rp1_i2s1_18_21 { + function = "i2s1"; + pins = "gpio18", "gpio19", "gpio20", "gpio21"; + bias-disable; + }; + + rp1_i2c4_34_35: rp1_i2c4_34_35 { + function = "i2c4"; + pins = "gpio34", "gpio35"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c6_38_39: rp1_i2c6_38_39 { + function = "i2c6"; + pins = "gpio38", "gpio39"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c4_40_41: rp1_i2c4_40_41 { + function = "i2c4"; + pins = "gpio40", "gpio41"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c5_44_45: rp1_i2c5_44_45 { + function = "i2c5"; + pins = "gpio44", "gpio45"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c0_0_1: rp1_i2c0_0_1 { + function = "i2c0"; + pins = "gpio0", "gpio1"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c0_8_9: rp1_i2c0_8_9 { + function = "i2c0"; + pins = "gpio8", "gpio9"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c1_2_3: rp1_i2c1_2_3 { + function = "i2c1"; + pins = "gpio2", "gpio3"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c1_10_11: rp1_i2c1_10_11 { + function = "i2c1"; + pins = "gpio10", "gpio11"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c2_4_5: rp1_i2c2_4_5 { + function = "i2c2"; + pins = "gpio4", "gpio5"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c2_12_13: rp1_i2c2_12_13 { + function = "i2c2"; + pins = "gpio12", "gpio13"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c3_6_7: rp1_i2c3_6_7 { + function = "i2c3"; + pins = "gpio6", "gpio7"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c3_14_15: rp1_i2c3_14_15 { + function = "i2c3"; + pins = "gpio14", "gpio15"; + drive-strength = <12>; + bias-pull-up; + }; + rp1_i2c3_22_23: rp1_i2c3_22_23 { + function = "i2c3"; + pins = "gpio22", "gpio23"; + drive-strength = <12>; + bias-pull-up; + }; + + // DPI mappings with HSYNC,VSYNC but without PIXCLK,DE + rp1_dpi_16bit_gpio2: rp1_dpi_16bit_gpio2 { /* Mode 2, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", + "gpio14", "gpio15", "gpio16", "gpio17", + "gpio18", "gpio19"; + bias-disable; + }; + rp1_dpi_16bit_cpadhi_gpio2: rp1_dpi_16bit_cpadhi_gpio2 { /* Mode 3 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24"; + bias-disable; + }; + rp1_dpi_16bit_pad666_gpio2: rp1_dpi_16bit_pad666_gpio2 { /* Mode 4 */ + function = "dpi"; + pins = "gpio2", "gpio3", + "gpio5", "gpio6", "gpio7", "gpio8", + "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio21", "gpio22", "gpio23", "gpio24", + "gpio25"; + bias-disable; + }; + rp1_dpi_18bit_gpio2: rp1_dpi_18bit_gpio2 { /* Mode 5, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", + "gpio14", "gpio15", "gpio16", "gpio17", + "gpio18", "gpio19", "gpio20", "gpio21"; + bias-disable; + }; + rp1_dpi_18bit_cpadhi_gpio2: rp1_dpi_18bit_cpadhi_gpio2 { /* Mode 6 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25"; + bias-disable; + }; + rp1_dpi_24bit_gpio2: rp1_dpi_24bit_gpio2 { /* Mode 7 */ + function = "dpi"; + pins = "gpio2", "gpio3", "gpio4", "gpio5", + "gpio6", "gpio7", "gpio8", "gpio9", + "gpio10", "gpio11", "gpio12", "gpio13", + "gpio14", "gpio15", "gpio16", "gpio17", + "gpio18", "gpio19", "gpio20", "gpio21", + "gpio22", "gpio23", "gpio24", "gpio25", + "gpio26", "gpio27"; + bias-disable; + }; + rp1_dpi_hvsync: rp1_dpi_hvsync { /* Sync only, for use with int VDAC */ + function = "dpi"; + pins = "gpio2", "gpio3"; + bias-disable; + }; + + // More DPI mappings, including PIXCLK,DE on GPIOs 0,1 + rp1_dpi_16bit_gpio0: rp1_dpi_16bit_gpio0 { /* Mode 2, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19"; + bias-disable; + }; + rp1_dpi_16bit_cpadhi_gpio0: rp1_dpi_16bit_cpadhi_gpio0 { /* Mode 3 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24"; + bias-disable; + }; + rp1_dpi_16bit_pad666_gpio0: rp1_dpi_16bit_pad666_gpio0 { /* Mode 4 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio5", "gpio6", "gpio7", "gpio8", + "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio21", "gpio22", "gpio23", "gpio24", + "gpio25"; + bias-disable; + }; + rp1_dpi_18bit_gpio0: rp1_dpi_18bit_gpio0 { /* Mode 5, not fully supported by RP1 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19", + "gpio20", "gpio21"; + bias-disable; + }; + rp1_dpi_18bit_cpadhi_gpio0: rp1_dpi_18bit_cpadhi_gpio0 { /* Mode 6 */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25"; + bias-disable; + }; + rp1_dpi_24bit_gpio0: rp1_dpi_24bit_gpio0 { /* Mode 7 -- All GPIOs used! */ + function = "dpi"; + pins = "gpio0", "gpio1", "gpio2", "gpio3", + "gpio4", "gpio5", "gpio6", "gpio7", + "gpio8", "gpio9", "gpio10", "gpio11", + "gpio12", "gpio13", "gpio14", "gpio15", + "gpio16", "gpio17", "gpio18", "gpio19", + "gpio20", "gpio21", "gpio22", "gpio23", + "gpio24", "gpio25", "gpio26", "gpio27"; + bias-disable; + }; + + rp1_gpclksrc0_gpio4: rp1_gpclksrc0_gpio4 { + function = "gpclk0"; + pins = "gpio4"; + bias-disable; + }; + + rp1_gpclksrc0_gpio20: rp1_gpclksrc0_gpio20 { + function = "gpclk0"; + pins = "gpio20"; + bias-disable; + }; + + rp1_gpclksrc1_gpio5: rp1_gpclksrc1_gpio5 { + function = "gpclk1"; + pins = "gpio5"; + bias-disable; + }; + + rp1_gpclksrc1_gpio18: rp1_gpclksrc1_gpio18 { + function = "gpclk1"; + pins = "gpio18"; + bias-disable; + }; + + rp1_gpclksrc1_gpio21: rp1_gpclksrc1_gpio21 { + function = "gpclk1"; + pins = "gpio21"; + bias-disable; + }; + + rp1_pwm1_gpio45: rp1_pwm1_gpio45 { + function = "pwm1"; + pins = "gpio45"; + bias-pull-down; + }; + + rp1_spi0_gpio9: rp1_spi0_gpio9 { + function = "spi0"; + pins = "gpio9", "gpio10", "gpio11"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi0_cs_gpio7: rp1_spi0_cs_gpio7 { + function = "spi0"; + pins = "gpio7", "gpio8"; + bias-pull-up; + }; + + rp1_spi1_gpio19: rp1_spi1_gpio19 { + function = "spi1"; + pins = "gpio19", "gpio20", "gpio21"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi2_gpio1: rp1_spi2_gpio1 { + function = "spi2"; + pins = "gpio1", "gpio2", "gpio3"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi3_gpio5: rp1_spi3_gpio5 { + function = "spi3"; + pins = "gpio5", "gpio6", "gpio7"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi4_gpio9: rp1_spi4_gpio9 { + function = "spi4"; + pins = "gpio9", "gpio10", "gpio11"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi5_gpio13: rp1_spi5_gpio13 { + function = "spi5"; + pins = "gpio13", "gpio14", "gpio15"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi8_gpio49: rp1_spi8_gpio49 { + function = "spi8"; + pins = "gpio49", "gpio50", "gpio51"; + bias-disable; + drive-strength = <12>; + slew-rate = <1>; + }; + + rp1_spi8_cs_gpio52: rp1_spi8_cs_gpio52 { + function = "spi0"; + pins = "gpio52", "gpio53"; + bias-pull-up; + }; + }; + + rp1_eth: ethernet@100000 { + reg = <0xc0 0x40100000 0x0 0x4000>; + compatible = "cdns,macb"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + clocks = <&macb_pclk &macb_hclk &rp1_clocks RP1_CLK_ETH_TSU>; + clock-names = "pclk", "hclk", "tsu_clk"; + phy-mode = "rgmii-id"; + cdns,aw2w-max-pipe = /bits/ 8 <8>; + cdns,ar2r-max-pipe = /bits/ 8 <8>; + cdns,use-aw2b-fill; + local-mac-address = [00 00 00 00 00 00]; + status = "disabled"; + }; + + rp1_csi0: csi@110000 { + compatible = "raspberrypi,rp1-cfe"; + reg = <0xc0 0x40110000 0x0 0x100>, // CSI2 DMA address + <0xc0 0x40114000 0x0 0x100>, // PHY/CSI Host address + <0xc0 0x40120000 0x0 0x100>, // MIPI CFG address + <0xc0 0x40124000 0x0 0x1000>; // PiSP FE address + + // interrupts must match rp1_pisp_fe setup + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; + assigned-clock-rates = <25000000>; + + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + rp1_csi1: csi@128000 { + compatible = "raspberrypi,rp1-cfe"; + reg = <0xc0 0x40128000 0x0 0x100>, // CSI2 DMA address + <0xc0 0x4012c000 0x0 0x100>, // PHY/CSI Host address + <0xc0 0x40138000 0x0 0x100>, // MIPI CFG address + <0xc0 0x4013c000 0x0 0x1000>; // PiSP FE address + + // interrupts must match rp1_pisp_fe setup + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; + assigned-clock-rates = <25000000>; + + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + rp1_mmc0: mmc@180000 { + reg = <0xc0 0x40180000 0x0 0x100>; + compatible = "raspberrypi,rp1-dwcmshc"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core + &rp1_clocks RP1_CLK_SDIO_TIMER + &rp1_sdio_clk0>; + clock-names = "bus", "core", "timeout", "sdio"; + /* Bank 0 VDDIO is fixed */ + no-1-8-v; + bus-width = <4>; + vmmc-supply = <&rp1_vdd_3v3>; + broken-cd; + status = "disabled"; + }; + + rp1_mmc1: mmc@184000 { + reg = <0xc0 0x40184000 0x0 0x100>; + compatible = "raspberrypi,rp1-dwcmshc"; + interrupts = ; + clocks = <&rp1_clocks RP1_CLK_SYS &sdhci_core + &rp1_clocks RP1_CLK_SDIO_TIMER + &rp1_sdio_clk1>; + clock-names = "bus", "core", "timeout", "sdio"; + bus-width = <4>; + vmmc-supply = <&rp1_vdd_3v3>; + /* Nerf SDR speeds */ + sdhci-caps-mask = <0x3 0x0>; + broken-cd; + status = "disabled"; + }; + + rp1_dma: dma@188000 { + reg = <0xc0 0x40188000 0x0 0x1000>; + compatible = "snps,axi-dma-1.01a"; + interrupts = ; + clocks = <&sdhci_core &rp1_clocks RP1_CLK_SYS>; + clock-names = "core-clk", "cfgr-clk"; + + #dma-cells = <1>; + dma-channels = <8>; + snps,dma-masters = <1>; + snps,dma-targets = <64>; + snps,data-width = <4>; // (8 << 4) == 128 bits + snps,block-size = <0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000 0x40000>; + snps,priority = <0 1 2 3 4 5 6 7>; + snps,axi-max-burst-len = <8>; + status = "disabled"; + }; + + rp1_usb0: usb@200000 { + reg = <0xc0 0x40200000 0x0 0x100000>; + compatible = "snps,dwc3"; + dr_mode = "host"; + usb3-lpm-capable; + snps,axi-pipe-limit = /bits/ 8 <8>; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-ss-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-fsls-quirk; + snps,tx-max-burst = /bits/ 8 <8>; + snps,tx-thr-num-pkt = /bits/ 8 <2>; + interrupts = ; + status = "disabled"; + }; + + rp1_usb1: usb@300000 { + reg = <0xc0 0x40300000 0x0 0x100000>; + compatible = "snps,dwc3"; + dr_mode = "host"; + usb3-lpm-capable; + snps,axi-pipe-limit = /bits/ 8 <8>; + snps,dis_rxdet_inp3_quirk; + snps,parkmode-disable-ss-quirk; + snps,parkmode-disable-hs-quirk; + snps,parkmode-disable-fsls-quirk; + snps,tx-max-burst = /bits/ 8 <8>; + snps,tx-thr-num-pkt = /bits/ 8 <2>; + interrupts = ; + status = "disabled"; + }; + + rp1_dsi0: dsi@110000 { + compatible = "raspberrypi,rp1dsi"; + status = "disabled"; + reg = <0xc0 0x40118000 0x0 0x1000>, // MIPI0 DSI DMA (ArgonDPI) + <0xc0 0x4011c000 0x0 0x1000>, // MIPI0 DSI Host (SNPS) + <0xc0 0x40120000 0x0 0x1000>; // MIPI0 CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>, + <&rp1_clocks RP1_CLK_MIPI0_DPI>, + <&rp1_clocks RP1_CLK_MIPI0_DSI_BYTECLOCK>, + <&clk_xosc>, // hardwired to DSI "refclk" + <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide + clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys"; + + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI0_CFG>; + assigned-clock-rates = <25000000>; + }; + + rp1_dsi1: dsi@128000 { + compatible = "raspberrypi,rp1dsi"; + status = "disabled"; + reg = <0xc0 0x40130000 0x0 0x1000>, // MIPI1 DSI DMA (ArgonDPI) + <0xc0 0x40134000 0x0 0x1000>, // MIPI1 DSI Host (SNPS) + <0xc0 0x40138000 0x0 0x1000>; // MIPI1 CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>, + <&rp1_clocks RP1_CLK_MIPI1_DPI>, + <&rp1_clocks RP1_CLK_MIPI1_DSI_BYTECLOCK>, + <&clk_xosc>, // hardwired to DSI "refclk" + <&rp1_clocks RP1_PLL_SYS>; // alternate parent for divide + clock-names = "cfgclk", "dpiclk", "byteclk", "refclk", "pllsys"; + + assigned-clocks = <&rp1_clocks RP1_CLK_MIPI1_CFG>; + assigned-clock-rates = <25000000>; + }; + + /* VEC and DPI both need to control PLL_VIDEO and cannot work together; */ + /* config.txt should enable one or other using dtparam=vec or an overlay. */ + rp1_vec: vec@144000 { + compatible = "raspberrypi,rp1vec"; + status = "disabled"; + reg = <0xc0 0x40144000 0x0 0x1000>, // VIDEO_OUT_VEC + <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_VEC>; + + assigned-clocks = <&rp1_clocks RP1_PLL_VIDEO_CORE>, + <&rp1_clocks RP1_PLL_VIDEO_SEC>, + <&rp1_clocks RP1_CLK_VEC>; + assigned-clock-rates = <1188000000>, + <108000000>, + <108000000>; + assigned-clock-parents = <0>, + <&rp1_clocks RP1_PLL_VIDEO_CORE>, + <&rp1_clocks RP1_PLL_VIDEO_SEC>; + }; + + rp1_dpi: dpi@148000 { + compatible = "raspberrypi,rp1dpi"; + status = "disabled"; + reg = <0xc0 0x40148000 0x0 0x1000>, // VIDEO_OUT DPI + <0xc0 0x40140000 0x0 0x1000>; // VIDEO_OUT_CFG + + interrupts = ; + + clocks = <&rp1_clocks RP1_CLK_DPI>, // DPI pixel clock + <&rp1_clocks RP1_PLL_VIDEO>, // PLL primary divider, and + <&rp1_clocks RP1_PLL_VIDEO_CORE>; // VCO, which we also control + clock-names = "dpiclk", "plldiv", "pllcore"; + + assigned-clocks = <&rp1_clocks RP1_CLK_DPI>; + assigned-clock-parents = <&rp1_clocks RP1_PLL_VIDEO>; + }; + }; +}; + +&clocks { + clk_xosc: clk_xosc { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "xosc"; + clock-frequency = <50000000>; + }; + macb_pclk: macb_pclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "pclk"; + clock-frequency = <200000000>; + }; + macb_hclk: macb_hclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "hclk"; + clock-frequency = <200000000>; + }; + sdio_src: sdio_src { + // 400 MHz on FPGA. PLL sys VCO on asic + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "src"; + clock-frequency = <1000000000>; + }; + sdhci_core: sdhci_core { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "core"; + clock-frequency = <50000000>; + }; + /* GPIO derived clock sources. Each GPIO with a GPCLK function + * can drive its output from the respective GPCLK + * generator, and provide a clock source to other internal + * dividers. Add dummy sources here so that they can be overridden + * with overlays. + */ + clksrc_gp0: clksrc_gp0 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP0>; + clock-output-names = "clksrc_gp0"; + }; + clksrc_gp1: clksrc_gp1 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP1>; + clock-output-names = "clksrc_gp1"; + }; + clksrc_gp2: clksrc_gp2 { + status = "disabled"; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + #clock-cells = <0>; + clocks = <&rp1_clocks RP1_CLK_GP2>; + clock-output-names = "clksrc_gp2"; + }; + clksrc_gp3: clksrc_gp3 { + status = "disabled"; + compatible = "fixed-factor-clock"; + clock-div = <1>; + clock-mult = <1>; + #clock-cells = <0>; + clocks = <&rp1_clocks RP1_CLK_GP3>; + clock-output-names = "clksrc_gp3"; + }; + clksrc_gp4: clksrc_gp4 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP4>; + clock-output-names = "clksrc_gp4"; + }; + clksrc_gp5: clksrc_gp5 { + status = "disabled"; + compatible = "fixed-factor-clock"; + #clock-cells = <0>; + clock-div = <1>; + clock-mult = <1>; + clocks = <&rp1_clocks RP1_CLK_GP5>; + clock-output-names = "clksrc_gp5"; + }; +}; + +/ { + rp1_vdd_3v3: rp1_vdd_3v3 { + compatible = "regulator-fixed"; + regulator-name = "vdd-3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +};