// SPDX-License-Identifier: GPL-2.0+ OR MIT /* * Copyright (C) 2019 Kontron Electronics GmbH */ /dts-v1/; #include "imx8mm-kontron-n801x-som.dtsi" / { model = "Kontron i.MX8MM N801X S"; compatible = "kontron,imx8mm-n801x-s", "kontron,imx8mm-n801x-som", "fsl,imx8mm"; aliases { ethernet1 = &usbnet; }; /* fixed crystal dedicated to mcp2515 */ osc_can: clock-osc-can { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <16000000>; clock-output-names = "osc-can"; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_led>; led1 { label = "led1"; gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; linux,default-trigger = "heartbeat"; }; led2 { label = "led2"; gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; }; led3 { label = "led3"; gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; }; led4 { label = "led4"; gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; }; led5 { label = "led5"; gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; }; led6 { label = "led6"; gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; }; }; pwm-beeper { compatible = "pwm-beeper"; pwms = <&pwm2 0 5000 0>; }; reg_rst_eth2: regulator-rst-eth2 { compatible = "regulator-fixed"; regulator-name = "rst-usb-eth2"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb_eth2>; gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>; enable-active-high; regulator-always-on; }; reg_vdd_5v: regulator-5v { compatible = "regulator-fixed"; regulator-name = "vdd-5v"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; }; &ecspi2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi2>; cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; status = "okay"; can0: can@0 { compatible = "microchip,mcp2515"; reg = <0>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_can>; clocks = <&osc_can>; interrupt-parent = <&gpio4>; interrupts = <28 IRQ_TYPE_EDGE_FALLING>; spi-max-frequency = <10000000>; vdd-supply = <®_vdd_3v3>; xceiver-supply = <®_vdd_5v>; }; }; &ecspi3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi3>; cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; status = "okay"; }; &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-connection-type = "rgmii-rxid"; phy-handle = <ðphy>; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy: ethernet-phy@0 { reg = <0>; reset-assert-us = <1>; reset-deassert-us = <15000>; reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; }; }; }; &i2c4 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c4>; status = "okay"; rtc@32 { compatible = "epson,rx8900"; reg = <0x32>; }; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; uart-has-rtscts; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; linux,rs485-enabled-at-boot-time; uart-has-rtscts; status = "okay"; }; &usbotg1 { dr_mode = "otg"; over-current-active-low; status = "okay"; }; &usbotg2 { dr_mode = "host"; disable-over-current; #address-cells = <1>; #size-cells = <0>; status = "okay"; usb1@1 { compatible = "usb424,9514"; reg = <1>; #address-cells = <1>; #size-cells = <0>; usbnet: usbether@1 { compatible = "usb424,ec00"; reg = <1>; local-mac-address = [ 00 00 00 00 00 00 ]; }; }; }; &usdhc2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2>; vmmc-supply = <®_vdd_3v3>; vqmmc-supply = <®_nvcc_sd>; cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; status = "okay"; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio>; pinctrl_can: cangrp { fsl,pins = < MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 >; }; pinctrl_ecspi2: ecspi2grp { fsl,pins = < MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19 >; }; pinctrl_ecspi3: ecspi3grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82 MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82 MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82 MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 /* PHY RST */ MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* ETH IRQ */ >; }; pinctrl_gpio_led: gpioledgrp { fsl,pins = < MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19 MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19 MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19 MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19 >; }; pinctrl_gpio: gpiogrp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 >; }; pinctrl_i2c4: i2c4grp { fsl,pins = < MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 >; }; pinctrl_usb_eth2: usbeth2grp { fsl,pins = < MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19 >; }; pinctrl_usdhc2: usdhc2grp { fsl,pins = < MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 >; }; };