From 1bb35ff4ce33e65601c8d9c736be52e4aabd6252 Mon Sep 17 00:00:00 2001 From: Calvin Johnson Date: Sat, 16 Sep 2017 14:20:23 +0530 Subject: [PATCH] arm64: dts: freescale: ls1012a: update with ppfe support Update ls1012a dtsi and platform dts files with support for ppfe. Signed-off-by: Calvin Johnson Signed-off-by: Anjaneyulu Jagarlmudi --- .../boot/dts/freescale/fsl-ls1012a-frdm.dts | 43 +++++++++++++++++ .../boot/dts/freescale/fsl-ls1012a-frwy.dts | 43 +++++++++++++++++ .../boot/dts/freescale/fsl-ls1012a-qds.dts | 43 +++++++++++++++++ .../boot/dts/freescale/fsl-ls1012a-rdb.dts | 47 +++++++++++++++++++ .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 29 ++++++++++++ 5 files changed, 205 insertions(+) --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts @@ -14,6 +14,11 @@ model = "LS1012A Freedom Board"; compatible = "fsl,ls1012a-frdm", "fsl,ls1012a"; + aliases { + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; + }; + sys_mclk: clock-mclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -95,6 +100,44 @@ }; }; +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ + fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x1>; /* enabled/disabled */ + }; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,gemac-bus-id = <0x1>; /* BUS_ID */ + fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x0>; /* enabled/disabled */ + }; + }; +}; + &qspi { status = "okay"; --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts @@ -14,6 +14,11 @@ / { model = "LS1012A FRWY Board"; compatible = "fsl,ls1012a-frwy", "fsl,ls1012a"; + + aliases { + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; + }; }; &duart0 { @@ -28,6 +33,44 @@ status = "okay"; }; +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ + fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x1>; /* enabled/disabled */ + }; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,gemac-bus-id = <0x1>; /* BUS_ID */ + fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x0>; /* enabled/disabled */ + }; + }; +}; + &qspi { status = "okay"; --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts @@ -18,6 +18,11 @@ mmc1 = &esdhc1; }; + aliases { + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; + }; + sys_mclk: clock-mclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -132,6 +137,44 @@ }; }; }; + +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ + fsl,gemac-phy-id = <0x1>; /* PHY_ID */ + fsl,mdio-mux-val = <0x2>; + phy-mode = "sgmii-2500"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x1>; /* enabled/disabled */ + }; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,gemac-bus-id = <0x1>; /* BUS_ID */ + fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x3>; + phy-mode = "sgmii-2500"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x0>; /* enabled/disabled */ + }; + }; +}; &qspi { status = "okay"; --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts @@ -16,6 +16,8 @@ aliases { serial0 = &duart0; + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; mmc0 = &esdhc0; mmc1 = &esdhc1; }; @@ -86,6 +88,44 @@ }; }; +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ + fsl,gemac-phy-id = <0x2>; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x1>; /* enabled/disabled */ + }; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,gemac-bus-id = < 0x1 >; /* BUS_ID */ + fsl,gemac-phy-id = < 0x1 >; /* PHY_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "rgmii-txid"; + fsl,pfe-phy-if-flags = <0x0>; + + mdio@0 { + reg = <0x0>; /* enabled/disabled */ + }; + }; +}; + &qspi { status = "okay"; --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -568,6 +568,35 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + pfe_reserved: packetbuffer@83400000 { + reg = <0 0x83400000 0 0xc00000>; + }; + }; + + pfe: pfe@04000000 { + compatible = "fsl,pfe"; + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */ + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */ + reg-names = "pfe", "pfe-ddr"; + fsl,pfe-num-interfaces = <0x2>; + interrupts = <0 172 0x4>, /* HIF interrupt */ + <0 173 0x4>, /*HIF_NOCPY interrupt */ + <0 174 0x4>; /* WoL interrupt */ + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol"; + memory-region = <&pfe_reserved>; + fsl,pfe-scfg = <&scfg 0>; + fsl,rcpm-wakeup = <&rcpm 0xf0000020>; + clocks = <&clockgen 4 0>; + clock-names = "pfe"; + + status = "okay"; + }; + firmware { optee { compatible = "linaro,optee-tz";